Method and system of data processor design by sensitizing logical difference

A method comprising:

• determining a first test vector to sensitize a functionality difference between a first portion of a first design representation and a second portion of the first design representation;
• and
• determining a design representation modification based upon the first test vector, wherein the design representation modification is to be used in a device instead of the first portion and the second portion to provide a desired logical functionality.

A system comprising:

• a differential test vector generator having a first input to access a first design representation, a second input to access a second design representation, and an output to provide a test vector that sensitizes a logical difference between at least a portion of the first design representation and at least a portion of the second design representation;
• and
• a error correction module having a first input coupled to access the first design representation, a second input coupled to access the second design representation, a third input coupled to the output of the differential test vector generator, and an output to provide a third design representation that is logically equivalent to the first design representation based on the test vector.

A computer readable medium for storing a data processing routine comprising:

• determining a test vector to sensitize a functionality difference between a first portion of a first design representation and a second portion of the first design representation;
• and
• determining a design representation modification based upon the test vector, wherein the design representation modification is to replace the first portion and the second portion to provide a desired logical functionality.