Methodology for the optimization of testing and diagnosis of analog and mixed signal ICs and embedded cores

A method for analyzing an integrated circuit (IC) having digital and analog components, wherein the IC is designed to meet a plurality of circuit performance specifications, and fabrication of the IC is monitored by measuring a set of process monitor variables and a previously defined set of electrical test variables, the method comprising the steps of:

• (a) detecting at least two of the set of electrical test variables that that are highly correlated with each other;
• (b) forming a subset of the set of electrical test variables, excluding at least one of the detected variables from the subset;
• (c) transforming the subset of the set of electrical test variables by a principle component transformation to a set of linearly independent principle components;
• (d) mapping the set of process monitor variables to the set of linearly independent principle components;
• (e) forming a plurality of figure-of-merit (FOM) performance response surface methodology models based on the process monitor variables;
• and
• (f) combining the FOM models with the mapping to enable modeling of IC performance based on the set of linearly independent principle components.