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US 7,003,682 B2Granted
Power management method for setting clock circuit into power down mode if analog front end circuit is sampling input signals in an electronic device
AssigneeKoninklijke Philips Electronics N.V.
InventorsJean-Marc Irazabal, Calto Wong
Life of this patent
Estimating the term…
Abstract
In an electronic device, a first electronic circuit is selectively operated in a selected one of at least two operating modes. A second electronic circuit is selectively operated in a power-up mode and a power-down mode. The second electronic circuit is put into the power-down mode if the first electronic circuit is operated in one of the at least two operating modes.
Claims13
An electronic device comprising:
- a first electronic circuit being operable in at least two operating modes;
- a second electronic circuit being operable in a power-up mode and a power-down mode, said electronic device being configured to put said second electronic circuit into said power-down mode if said first electronic circuit is operating in one of said at least two operating modes;
- wherein said first electronic circuit comprises an analog front end for selectively sampling a selected one of a plurality of input signals, and a first operating mode of said at least two operating modes includes sampling with a first clock means;
- and
- wherein said second electronic circuit is a second clock means;
- a second operating mode of sad at least two operating modes including sampling with said second clock means;
- and
- in said first operating mode said electronic device, putting said second electronic circuit into said power-down mode.
5 more elements
An integrated circuit for an electronic device, said integrated circuit comprising:
- a first electronic circuit being operable in at least two operating modes;
- a second electronic circuit being operable in a power-up mode and a power-down mode, said second electronic circuit being operated into said power-down mode if said first electronic circuit is operating in one of said at least two operating modes;
- wherein said first electronic circuit comprises an analog front end for selectively sampling a selected one of a plurality of input signals, and a first operating mode of said at least two operating modes includes sampling with a first clock means;
- and
- wherein said second electronic circuit is a second clock means;
- a second operating mode of said at least two operating modes including sampling with said second clock means;
- and
- in said first operating mode said electronic device, putting said second electronic circuit into said power-down mode.
5 more elements
A method of operating an electronic device, said method comprising:
- selectively operating a first electronic circuit in a selected one of at least two operating modes;
- selectively operating a second electronic circuit in a power-up mode and a power-down mode;
- and
- putting said second electronic circuit into said power-down mode if said first electronic circuit is operated in one of said selected ones of said at least two operating modes;
- wherein said first electronic circuit comprises an analog front end for selectively sampling a selected one of a plurality of input signals, and a first operating mode of said at least two operating modes includes sampling with a first clock means;
- and
- wherein said second electronic circuit is a second clock means;
- sampling with said second clock means in a second operating mode of said at least two operating modes;
- and
- in said first operating mode said electronic device, putting said second electronic circuit into said power-down mode.
7 more elements
Dependencies are inferred from the claim text.