A computer program product for dynamically minimizing translation lookaside buffer (TLB) entries across contiguous memory in a processor system, said computer program product including a plurality of computer executable instructions stored on a computer readable medium, wherein said instructions, when executed by the processor system, cause the processor system to perform the steps of:
- providing a page table with page table entries (PTEs) for mapping multiple sized pages from a virtual address space to a physical address space, each of said multiple sized pages being a natural block size multiple of a base page size;
- for a region of contiguous memory having a virtual address and length, dividing said memory region into a minimum number of largest natural blocks based upon alignment and size for said memory region;
- assigning PTEs to map said natural blocks;
- multiple identical PTEs being assigned for each of said natural blocks greater than said base page size;
- using one TLB entry to map each of said largest natural blocks;
- and
- coalescing multiple first PTEs into a second PTE including identifying a matching page size for said first PTEs;
- identifying matching attributes for said first PTEs;
- said second PTE having a larger page size than said first PTEs.