System and method of identifying liveness groups within traces stored in a trace cache
AssigneeAdvanced Micro Devices, Inc.
InventorMitchell Alsup
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Abstract
A microprocessor may include a trace cache and a trace generator. The trace cache includes several trace cache entries. Each trace cache entry is configured to store several operations and a respective set of liveness indications. The operations are generated by at least partially decoding several instructions. The trace generator may be configured to generate the respective plurality of liveness indications for the operations stored in each trace cache entry. Each liveness indication identifies whether its respective operation depends on a branch operation stored within that trace cache entry.
Claims46
A microprocessor, comprising:
- a trace cache comprising a plurality of trace cache entries, wherein each trace cache entry is configured to store a plurality of operations and a respective plurality of liveness indications, wherein the plurality of operations are generated by at least partially decoding a plurality of instructions;
- a trace generator configured to generate the respective plurality of liveness indications for the plurality of operations in each trace cache entry, wherein each liveness indication identifies whether execution of its respective operation depends on a branch operation stored within that trace cache entry.
A method, comprising:
- at least partially decoding a plurality of instructions into a plurality of operations;
- storing a trace of operations within a trace cache, wherein the trace of operations includes one or more operations that depend on a branch operation included in the trace of operations, wherein the trace of operations includes at least some of the plurality of operations;
- and
- generating a liveness indication for each operation included in the trace of operations, wherein the liveness indication indicates whether execution of a respective operation depends on the branch operation.
A computer system, comprising:
- a system memory configured to store a plurality of instructions;
- and
- a microprocessor coupled to the system memory, wherein the microprocessor comprises:
- a trace cache comprising a plurality of trace cache entries, wherein each trace cache entry is configured to store a plurality of operations and a respective plurality of liveness indications, wherein the plurality of operations are generated by at least partially decoding the plurality of instructions;
- a trace generator configured to generate the respective plurality of liveness indications for the plurality of operations in each trace cache entry, wherein each liveness indication identifies which branch operation stored within that trace, if any, execution of a respective operation depends on.
A device, comprising:
- means for at least partially decoding a plurality of instructions into a plurality of operations;
- means for storing a trace of operations, wherein the trace of operations includes one or more operations that depend on a branch operation included in the trace of operations, wherein the trace of operations includes at least some of the plurality of operations;
- and
- means for generating a liveness indication for each operation included in the trace of operations, wherein the liveness indication indicates whether execution of a respective operation depends on the branch operation.
A microprocessor, comprising:
- a trace cache comprising a plurality of trace cache entries, wherein each trace cache entry is configured to store a plurality of operations and a respective plurality of liveness indications, wherein each liveness indication identifies whether execution of its respective operation depends on a branch operation stored within that trace cache entry;
- a dispatch unit configured to receive a trace of operations stored in one of the plurality of trace cache entries from the trace cache, wherein the dispatch unit is configured to handle each operation in the trace dependent on the respective liveness indication associated with that operation.
Dependencies are inferred from the claim text.