Method and apparatus for generating a squared value for a signed binary number
AssigneeAltera Corporation
InventorMartin Langhammer
Life of this patent
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Abstract
A squaring circuit for signed binary numbers includes a signed binary number modification unit that generates a modified signed binary number. The squaring circuit includes a partial product generation unit that generates partial products that make up a squared value of the modified signed binary number. The squaring circuit includes a correction value generation unit that generates a correction value for the signed binary number. The squaring circuit includes a summing unit that sums the partial products with the correction value to generate a squared value for the signed binary number.
Claims30
A squaring circuit for a signed binary number (SBN), comprising:
- means for generating a modified SBN by either inverting bits of the SBN if the SBN is negative or designating the SBN as the modified SBN if the SBN is positive;
- means for squaring the modified SBN to generate a squared modified SBN;
- and
- means for summing the squared modified SBN with a correction value.
A squaring circuit for a signed binary number (SBN), comprising:
- means for performing an XOR function on bit values of the SBN with a value of a most significant bit of the SBN to generate a modified SBN;
- means for squaring the modified SBN to generate a squared modified SBN;
- and
- means for summing the squared modified SBN with a correction value.
A squaring circuit for a signed binary number (SBN), comprising:
- means for assigning to a third most significant bit (MSB) of the squared value a first bit value that includes a sum of a modified bit value of a second MSB of the SBN with a product of the modified bit value of the second MSB of the SBN with a modified bit value of a third MSB of the SBN;
- means for assigning to a fourth MSB of the squared value a second bit value that includes a product of the modified bit value of the second MSB of the SBN with a modified bit value of a fourth MSB of the SBN;
- and
- means for assigning to a least significant bit (LSB) of the squared value a third bit value that includes a sum of a modified bit value of a LSB of the SBN and a bit value of the MSB of the SBN.
A squaring circuit for signed binary numbers, comprising:
- a signed binary number (SBN) modification unit that generates a modified SBN;
- a partial product generation unit that generates partial products that make up a squared value of the modified SBN;
- a correction value generation unit that generates a correction value for the SBN;
- and
- a summing unit that sums the partial products with the correction value to generate a squared value for the SBN.
A squaring circuit for signed binary numbers, comprising:
- means for generating a modified SBN;
- means for generating partial results that make up a squared value of the modified SBN;
- means for generating a correction value for the SBN;
- and
- means for summing the partial results with the correction value to generate a squared value for the SBN.
Dependencies are inferred from the claim text.