Method of and system for analyzing cells of a memory device

A method of analyzing cells of a memory device, said method comprising the steps of:

• establishing a plurality of fail signatures, each fail signature being associated with a type of failure;
• applying voltages according to a plurality of test patterns to nodes of a cell of said memory device;
• analyzing fail data of said cell for said plurality of patterns;
• determining a fail signature of said cell;
• and
• determining a type of failure of said cell based upon said plurality of fail signatures.

A method of analyzing cells of a memory device, said method comprising the steps of:

• establishing a plurality of fail signatures for said memory device, each fail signature being associated with a type of failure of a cell;
• applying voltages according to a plurality of test patterns to nodes of a plurality of cells of said memory device;
• analyzing fail data for said plurality of test patterns applied to said cells;
• determining a fail signature of said plurality of cells;
• comparing said fail signatures of said plurality of cells to said plurality of fail signatures;
• and
• determining a type of failure for each failing cell of said plurality of cells.

A system for analyzing cells of a memory device, said system comprising:

• a plurality of probes applying different test voltages to a cell of said memory device;
• a control circuit varying the voltages applied to said cell, said control circuit comparing the failures of said cell as the test voltages applied to said cell are varied to an artificial bit fail map;
• and
• an output device generating an output indicating a type of failure of said cell.