Method for connecting test bench elements and shell device
AssigneeInfineon Technologies AG
InventorsMatthias Bauer, Wolfgang Ecker, Renate Henftling, Martin Zambaldi, Andreas Zinn
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AssigneeInfineon Technologies AG
InventorsMatthias Bauer, Wolfgang Ecker, Renate Henftling, Martin Zambaldi, Andreas Zinn
Estimating the term…
The invention provides a method for connecting test bench elements (102a–102f), and a shell device, a test bench element shell (201) partially or completely surrounding a circuit unit (101) to be verified, so that test bench elements (102a–102f) can be connected to the test bench element shell (201). Test data streams (203a–203f) pass in each case between the test bench elements (102a–102f) and the test bench element shell (201), the test bench element shell (201) which surrounds the circuit unit (101) to be verified being connected via interface data streams (P0(0)–P0(7), P1(0)–P1(7), 204a, 204b, 204c) to the circuit unit (101) to be verified. The test bench element shell (201) ensures that in each case a specific protocol with associated operations can be executed, during which process, depending on the configuration, an interface exchanges interface data streams (P0(0)–P0(7), P1(0)–P1(7), 204a–204c) of the circuit unit (101) to be verified with the corresponding test bench element (102a–102f).
A method for simulating and testing a circuit unit to be verified, in which method interface data streams of the circuit unit to be verified are exchanged with test bench elements in a test/simulation device, having the steps:
A method for simulating and testing a circuit unit to be verified, in which method interface data streams of the circuit unit to be verified are exchanged with test bench elements in a test/simulation device, having the steps:
A method for simulating and testing a circuit unit to be verified, in which method interface data streams of the circuit unit to be verified are exchanged with test bench elements in a test/simulation device, having the steps:
A method for simulating and testing a circuit unit to be verified, in which method interface data streams of the circuit unit to be verified are exchanged with test bench elements in a test/simulation device, having the steps:
A method for simulating and testing a circuit unit to be verified, in which method interface data streams of the circuit unit to be verified are exchanged with test bench elements in a test/simulation device, having the steps:
A method for simulating and testing a circuit unit to be verified, in which method interface data streams of the circuit unit to be verified are exchanged with test bench elements in a test/simulation device, having the steps:
A method for simulating and testing a circuit unit to be verified, in which method interface data streams of the circuit unit to be verified are exchanged with test bench elements in a test/simulation device, having the steps:
A method for simulating and testing a circuit unit to be verified, in which method interface data streams of the circuit unit to be verified are exchanged with test bench elements in a test/simulation device, having the steps:
A method for simulating and testing a circuit unit to be verified, in which method interface data streams of the circuit unit to be verified are exchanged with test bench elements in a test/simulation device, having the steps:
A method for simulating and testing a circuit unit to be verified, in which method interface data streams of the circuit unit to be verified are exchanged with test bench elements in a test/simulation device, having the steps:
A method for simulating and testing a circuit unit to be verified, in which method interface data streams of the circuit unit to be verified are exchanged with test bench elements in a test/simulation device, having the steps:
A method for simulating and testing a circuit unit to be verified, in which method interface data streams of the circuit unit to be verified are exchanged with test bench elements in a test/simulation device, having the steps:
A method for simulating and testing a circuit unit to be verified, in which method interface data streams of the circuit unit to be verified are exchanged with test bench elements in a test/simulation device, having the steps:
A method for simulating and testing a circuit unit to be verified, in which method interface data streams of the circuit unit to be verified are exchanged with test bench elements in a test/simulation device, having the steps:
A method for simulating and testing a circuit unit to be verified, in which method interface data streams of the circuit unit to be verified are exchanged with test bench elements in a test/simulation device, having the steps:
A method for simulating and testing a circuit unit to be verified, in which method interface data streams of the circuit unit to be verified are exchanged with test bench elements in a test/simulation device, having the steps:
A method for simulating and testing a circuit unit to be verified, in which method interface data streams of the circuit unit to be verified are exchanged with test bench elements in a test/simulation device, having the steps:
A method for simulating and testing a circuit unit to be verified, in which method interface data streams of the circuit unit to be verified are exchanged with test bench elements in a test/simulation device, having the steps:
A method for simulating and testing a circuit unit to be verified, in which method interface data streams of the circuit unit to be verified are exchanged with test bench elements in a test/simulation device, having the steps:
A method for simulating and testing a circuit unit to be verified, in which method interface data streams of the circuit unit to be verified are exchanged with test bench elements in a test/simulation device, having the steps:
Dependencies are inferred from the claim text.