Card for testing functions of card interface

A testing system, coupled to a card interface installed in an electronic device to test a function of the card interface, wherein the card interface complies with an interface specification, the testing system comprising:

• a converting circuit which is used to receive, convert and output an attribute control signal, a common memory signal and an I/O signal fed in from the card interface;
• a latch circuit which is used to receive a data signal fed in from the card interface, latch the data signal and have the data signal outputted afterwards;
• a data processor which is coupled to the converting circuit and the latch circuit and is used to proceed with testing according to the data signal and the signal outputted from the converting circuit, wherein the data processor will perform testing system identification when the card interface is inserted into the testing system:
• displaying an error message if the identification fails, otherwise proceeding with step A if the identification is successful;
• A. proceeding with 16 bits I/O addressing mode test of the I/O signal:
• displaying an error message if the test fails, otherwise proceeding with step B;
• B. proceeding with 16 bits attribute addressing mode test of the control signal:
• displaying an error message if the test fails, otherwise proceeding with step C;
• C. proceeding with 16 bits memory addressing mode test of the common memory signal:
• displaying an error message if the test fails, otherwise proceeding with step D;
• D. setting the test to be 8 bits testing mode;
• E. proceeding with 8 bits I/O addressing mode test of the I/O signal and displaying an error message if the test fails;
• a signal generator which is used to output a mode selection signal and an interrupt signal to the card interface, and, according to a control signal fed in from the card interface, generate an enable signal and have the enable signal outputted afterwards;
• an oscillation combination circuit, which is coupled to the signal generator and is used to generate a wait signal according to the enable signal and feed the wait signal to the card interface, wherein the oscillation combination circuit outputs the wait signal according to the enable signal to execute counting processing, and, after the counting is finished, the wait signal is disabled and the counting processing is executed again, and wherein the data processor determines if the wait signal complies with the standard according to the values of counting obtained when the wait signal is enabled and disabled respectively;
• and
• a reset circuit, which is coupled to the latch circuit, the data processor, the signal generator and the oscillation combination circuit and is used to reset the above latch circuit, the data processor, the signal generator and the oscillation combination circuit.