Circuit for detecting and formatting data frames

A data frame detection and formatting circuit in a contactless integrated circuit card, comprising:

• a state machine;
• a plurality of circuits that supply control signals to the state machine, wherein the plurality of circuits detect binary digits for a frame and arrange the binary digits in the form of bytes;
• a decoding circuit to decode a number of bytes in the frame and to provide the number of bytes in the frame to at least one of the plurality of circuits;
• and
• a plurality of registers, wherein one or more of the registers stores at least one byte in the frame as directed by the plurality of circuits;
• a serial comparator for comparing binary digits forming a selection identifier and binary digits forming a serial number of the Integrated circuit card, the serial comparator comprising:
• a first flip flop, including a first input terminal for receiving the binary digits of the selection identifier and a second input terminal for receiving a clock pulse so that a state of the first flip flop is changed on a rising front of the clock pulse;
• a second flip flop, including a first input terminal for receiving binary digits of the serial number of the integrated circuit cards, and a second input terminal for receiving the clock pulse so that the state of the second flip flop is changed on the rising front of the clock pulse;
• an Exclusive OR circuit, including a first input terminal connected to an output terminal of the first flip flop, and a second input terminal connected to an output terminal of the second flip flop;
• a third flip flop with a first input, a second input and an output;
• an “AND” circuit, including a first input terminal is connected to an output terminal of the Exclusive OR circuit, and the output terminal of which is connected to the first input terminal of the third flip flop;
• wherein the output terminal of the third flip flop is connected to a second input terminal of the “AND” circuit so that the state of the third flip flop is changed on a falling front of a clock pulse applied to the second input terminal of the third flip flop.

A process for detection and formatting of data frames for a signal received by a contactless integrated circuit card, comprising:

• receiving a series of binary digits;
• detecting a start of frame and an end of frame in the series of bits;
• detecting a start of byte boundary and an end of byte boundary in the series of bits;
• counting binary digits received after each start byte boundary until a byte is obtained;
• storing each byte received in a register;
• analyzing at least a first byte to determine the number of bytes in the frame;
• and
• loading a countdown register with the number of bytes in the frame;
• wherein the number of bytes in the frame is variable.