Jabber counter mechanism for elastic buffer operation
AssigneeIntel Corporation
InventorsDean S. Susnow, Richard D. Reohr, Jr.
Life of this patent
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AssigneeIntel Corporation
InventorsDean S. Susnow, Richard D. Reohr, Jr.
Estimating the term…
An Elastic Buffer is provided to process data in a computer network and a write controller is provided to control memory storage operation of such an Elastic Buffer. The write controller may comprise a comparator mechanism which detects if link data from a source contains an IDLE signal; a Jabber counter mechanism which counts each cycle of a link clock in which an IDLE signal is not detected, and resets the count each time the IDLE signal is detected, and which asserts a DISABLE signal for a single link clock cycle if a count value reaches a programmed time-out value; and a logic gate which logically combines outputs from the comparator mechanism and the Jabber counter mechanism to generate a Write control signal for prohibiting a corresponding link data sequence from being stored in memory storage of the Elastic Buffer so as to prevent data overflow in the memory storage.
A write controller for controlling memory storage operation of an Elastic Buffer, comprising:
A computer network, comprising:
Dependencies are inferred from the claim text.