Time delay estimation in a transmitter
AssigneeIntel Corporation
InventorsAmir Francos, Daniel Yellin, Eran Gureshnik
Life of this patent
Estimating the term…
Abstract
In an embodiment, a transmitter section for a mobile device includes a predistorter for predistorting an input signal input to a modulation section. Predistortion values may be selected from a look-up table in response to a fed back signal from the output of the modulation section. A delay between the input signal and the fed back signal may be determined in two stages: a coarse delay estimation for determining a whole number of sample cycles, and a fine delay estimation for determining a fraction of a sample cycle to be added to the coarse delay estimation value.
Claims31
A method comprising:
- calculating a first delay value representing an estimated delay between an input signal and a fed back signal, said first delay value comprising a whole number of sample cycles;
- calculating a second delay value from said first delay value, said second delay value comprising a fraction of a sample cycle;
- and
- adding the first delay value and the second delay value to generate a third delay value representing a more precise estimated delay between the input signal and the fed back signal.
An apparatus comprising:
- a modulation path having an input operative to receive an input signal, said modulation path operative to modulate said input signal and output a modulated signal for transmission;
- a feedback path operative to generate a feedback signal from the modulated signal;
- and
- a predistorter connected between the feedback path and the input of the modulation path, said predistorter comprising a delay estimator operative to
- calculate a first delay value representing an estimated delay between the input signal and the feedback signal, said first delay value comprising a whole number of sample cycles,
- calculate a second delay value from said first delay value, said second delay value comprising a fraction of a sample cycle, and
- add the first delay value and the second delay value to generate a third delay value representing a more precise estimated delay between the input signal and the feedback signal.
A article comprising a machine-readable medium which stores machine-executable instructions, the instructions causing a machine to:
- calculate a first delay value representing an estimated delay between an input signal and a fed back signal, said first delay value comprising a whole number of sample cycles;
- calculate a second delay value from said first delay value, said second delay value comprising a fraction of a sample cycle;
- and
- add the first delay value and the second delay value to generate a third delay value representing a more precise estimated delay between the input signal and the fed back signal.
A system comprising:
- an antenna;
- a modulation path having an input operative to receive an input signal, said modulation path operative to modulate said input signal and output a modulated signal for transmission from the antenna;
- a feedback path operative to generate a feedback signal from the modulated signal;
- and
- a predistorter connected between the feedback path and the input of the modulation path, said predistorter comprising a delay estimator operative to
- calculate a first delay value representing an estimated delay between the input signal and the feedback signal, said first delay value comprising a whole number of sample cycles,
- calculate a second delay value from said first delay value, said second delay value comprising a fraction of a sample cycle, and
- add the first delay value and the second delay value to generate a third delay value representing a more precise estimated delay between the input signal and the feedback signal.
Dependencies are inferred from the claim text.