Scheduling techniques for data cells in a data switch

A switch element, comprising:

• a first input routing portion including a first switch matrix input port for receiving data;
• a first buffer portion including a first plurality of buffers;
• a switch matrix portion for routing data out from the first plurality of buffers and a second plurality of buffers;
• a first output arbitrating portion, including,
• a first plurality of schedulers for receiving the data from the first plurality of buffers and the second plurality of buffers through the switch matrix,
• a first selector for receiving data from the first plurality of schedulers, the first selector enabling output from the switch element through a first switch matrix output port;
• a second input routing portion including a second switch matrix input port for receiving data;
• a second buffer portion including the second plurality of buffers;
• a second output arbitrating portion, including,
• a second plurality of schedulers for receiving the data from the first plurality of buffers and the second plurality of buffers through the switch matrix,
• a second selector for receiving data from the second plurality of schedulers, the second selector enabling output from the switch element through a second switch matrix output port;
• a plurality of traffic generators for inputting data into the first input routing portion and the second input routing portion;
• and
• a plurality of traffic acceptors to receive data from the first output arbitrating portion and the second output arbitrating portion.