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US 7,002,873 B2Granted
Memory array with staged output
AssigneeIntel Corporation
InventorsStephan J. Jourdan, Boyd S. Phelps, Chris E. Yuker
Life of this patent
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Abstract
Embodiments of the present invention provide a method and system for staging the data output from an addressable memory location as a plurality of fields. In embodiments, each field of a data item that is stored at an address may be output during a different clock cycle. In further embodiments, the most time critical field may be output first.
Claims23
A memory array comprising:
- a plurality of addressable memory locations;
- and
- a circuit to stage the data output from an addressable memory location so that different stages of the data from that addressable memory location are to be output at different times, wherein each stage is a field of the data stored at the memory location.
A memory array comprising:
- a first bank comprising a plurality of memory cells;
- an input port to receive an address that identifies a memory location, wherein each memory location comprises a plurality of subdivisions, wherein each subdivision comprises a plurality of said first bank memory cells;
- and
- a stage delay circuit to cause each of the memory location subdivisions in the first bank that are identified by a particular address to output data during a different cycle of a clock than any other memory location subdivisions in the first bank that are identified by that address.
1 more element
A memory array comprising:
- a main array control block to control the output of data items from the memory array for a plurality of addresses, wherein the main array control block has a plurality of sides;
- a first bank of memory cells located on a first side of the main array control block, wherein the first bank is to store a first field of each of said data items;
- and
- a second bank of memory cells located on a different side of the main array control block than the first bank, wherein the second bank is to store a second field of each of said data items.
1 more element
A method comprising:
- sending a request to a memory array to read from an address;
- and
- receiving the data item stored at the address from the memory array, wherein the data item is output as a plurality of data fields, wherein the fields are output in stages, and wherein a most time critical field in the data item is output before a less time critical field in the data item.
Dependencies are inferred from the claim text.