Voltage regulator circuit
AssigneeSamsung Electronics Co., Ltd.
InventorsPyung-Moon Zhang, Seung-Keun Lee
Life of this patent
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Abstract
A voltage regulator circuit and a semiconductor memory device using the same are provided. The voltage regulator circuit regulates an input voltage to provide an output voltage. The voltage regulator circuit comprises a voltage divider to divide the output voltage, a comparator to determine whether the divided voltage is less than a reference voltage, a driver connected between the input voltage and the output voltage, and operating operate responsive to the comparator, and a controller to control the voltage divider to gradually vary the output voltage. The voltage divider includes a resistance that operates responsive to the controller and whose value varies in a binary weighted form.
Claims25
A voltage regulator circuit to regulate an input voltage and generate an output voltage, the voltage regulator circuit comprising:
- a voltage divider to generate a divided voltage;
- a comparator to compare the divided voltage to a reference voltage;
- a driver connected between an input voltage and an output voltage, the driver operating responsive to the comparator;
- and
- a controller to control the voltage divider with a control signal to gradually vary the output voltage;
- where the voltage divider includes
- a first resistance adapted to vary in a binary weighted form responsive to the controller;
- and
- a second resistance having a second fixed resistance serially connected to the first resistance.
A voltage regulator circuit comprising:
- an input terminal to receive a high voltage;
- an output terminal to provide an output voltage therefrom;
- a plurality of resistors connected serially between the output terminal and a ground voltage;
- a plurality of switches each connected in parallel to a corresponding one of the resistors;
- a controller to generate control signals that operate the switches;
- a comparator to compare a divided voltage output from the plurality of resistors to a reference voltage;
- and
- a driver connected between the input terminal and the output terminal and operating responsive to the comparator;
- where the plurality of resistors comprises at least one weighted resistor, and a resistor having a fixed resistance serially connected to the weighted resistor.
A semiconductor memory device, comprising:
- an array of memory cells arranged in a matrix of rows and columns;
- a decoder to decode one of the columns to supply the selected column with a word line voltage;
- and
- a word line voltage generating circuit to generate the word line voltage, where the word
- line voltage generating circuit comprises:
- a high voltage generator to generate a high voltage;
- a voltage divider to divide the high voltage;
- a comparator to compare divided voltage is to a reference voltage;
- a driver connected between the high voltage and the word line voltage and operating responsive to the comparator;
- and
- a controller to control the voltage divider to gradually vary the output voltage;
- and
- where the voltage divider includes
- a resistance unit having a first resistance value that varies in a binary weighted form responsive to the controller and a second resistance that is fixed serially connected to the first resistance value.
Dependencies are inferred from the claim text.