Semiconductor device having automatic controlled delay circuit and method therefor

A method for driving a semiconductor device, which comprises the steps of:

• delaying a wordline activating signal in a delay circuit to output the same as a bitline sense amplifier activating signal;
• generating a plurality of delayed pulse signals, wherein the plurality of delayed pulse signals is generated by delaying a reference pulse signal having a delay value of the delay circuit, which is designed at a time point at which the wordline activating signal is activated, through the use of an internal clock;
• detecting an activation time point of the bitline sense amplifier activating signal to generate a detected pulse signal;
• and
• comparing the plurality of delayed pulse signals with the detected pulse signal to adjust the delay amount of the delay circuit.

A semiconductor device having a delay circuit which outputs a first signal as a second signal after a predetermined time period, wherein the delay circuit is implemented with a plurality of unit delay blocks that are connected serially, which comprises:

• means for generating a plurality of delayed pulse signals, each of which has different delay values at a time point at which the first signal is activated, through the use of an internal clock;
• means for detecting an activation time point of the second signal to generate a detected pulse signal;
• and
• means for comparing the plurality of delayed pulse signals with the detected pulse signal to adjust the plurality of unit delay blocks.

A method for driving a semiconductor device, which comprises the steps of:

• delaying a first signal in a delay circuit to output the same as a second signal;
• generating a plurality of delayed pulse signals, wherein the plurality of delayed pulse signals is generated by delaying a reference pulse signal having a delay value of the delay circuit, which is designed at a time point at which the first signal is activated, through the use of an internal clock;
• detecting an activation time point of the second signal to generate a detected pulse signal;
• and
• comparing the plurality of delayed pulse signals with the detected pulse signal to control the delay amount of the second signal.