Non-volatile semiconductor memory device
AssigneeSharp Kabushiki Kaisha
InventorHidenori Morimoto
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AssigneeSharp Kabushiki Kaisha
InventorHidenori Morimoto
Estimating the term…
The present invention is intended to realize executing high-speed program and erasure by using a NAND type memory cell unit that suits high degree of integration and to realize providing a highly reliable non-volatile semiconductor memory device. A memory cell is made up of a cell transistor (Tij) that is formed on the semiconductor substrate and a variable resistive element (Rij) that is connected between a source and drain terminals of the cell transistor (Tij) and the resistance value of that varies depending on applying a voltage and that is formed of the oxide having a perovskite structure that contains manganese. By connecting a plurality of the memory cells in series, there is formed a memory cell connected-in-series part. Then a memory cell block is prepared by providing a selection transistor (Si) to at least one end of the memory cell connected-in-series part. By disposing more than one such memory cell block, there is constructed a memory cell array.
A non-volatile semiconductor memory device, comprising
A driving method for a non-volatile semiconductor memory device, the non-volatile semiconductor memory device including a memory cell array;
Dependencies are inferred from the claim text.