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US 7,002,832 B2Granted
One-time programming multiple-level memory cells
AssigneeSTMicroelectronics S.r.l.
InventorsLuc Wuidart, Michel Bardouillet
Life of this patent
Estimating the term…
Abstract
A multiple-level memory cell including a storage element formed of several polysilicon resistors connected in series between two input/output terminals; and a load in series with said resistive element, the midpoint of this series connection forming a read terminal of the memory cell, and the respective junction points of said resistors of the storage element being accessible.
Claims10
A multiple-level memory cell, comprising:
- a storage element formed of several polysilicon resistors connected in series between two input/output terminals;
- a load in series with said resistive element, the junction point thereof forming a read terminal of the memory cell, and the respective junctions between said resistors of the storage element being accessible;
- and
- wherein at least certain points among said junctions of the storage element and the junction of this element with the load, are connectable, individually by a switch, either to one of said input/output terminals of the storage element, or to a terminal of application of a predetermined voltage, wherein individual programming of the resistors may be performed.
1 more element
Dependencies are inferred from the claim text.