Content addressable memory architecture
AssigneeMosaid Technologies Incorporated
InventorsRobert N. McKenzie, Dieter Haerle, Sean Lord
Life of this patent
Estimating the term…
Abstract
A Content Addressable Memory array includes a plurality of coupled sub-blocks arranged in rows and columns. Search data received by a first sub-block in a first column of the CAM is propagated to each sub-block in the row to the last sub-block in the last column of the CAM. The search result for the CAM is selected based on the propagated search results for each row of sub-blocks and output on a side of the array opposite from the side receiving the search data.
Claims12
A Content Addressable Memory comprising:
- an array of content addressable sub-blocks, each sub-block in a first column of the array coupled to a plurality of data inputs for receiving data, data received by a sub-block in a row in the first column of the array being propagated across the array to each subsequent sub-block in the row of the array;
- a clock signal coupled to each sub-block in the area, each sub-block latching the received data and results of an operation on an edge of the clock;
- and
- a plurality of outputs for forwarding results of an operation in rows of sub-blocks in the array coupled to a last column of the array, the last column being on the opposite side of the array to the first column.
A Content Addressable Memory comprising:
- an array of content addressable sub-blocks, each sub-block in a first column of the array coupled to a plurality of data inputs for receiving data, data received by a sub-block in a row in the first column of the array being propagated across the array to each subsequent sub-block in the row of the array;
- a plurality of outputs for forwarding results of an operation in rows of sub-blocks in the array coupled to a last column of the array, the last column being on the opposite side of the array to the first column;
- and
- priority encoder logic coupled to each sub-block in the last column in the array which encodes match flags from rows of sub-blocks to provide the results of the operation.
A Content Addressable Memory comprising:
- an array of content addressable sub-blocks, each sub-block in a first column of the array coupled to a plurality of data inputs for receiving data, data received by a sub-block in a row in the first column of the array being propagated across the array to each subsequent sub-block in the row of the array;
- a plurality of outputs for forwarding results of an operation in rows of sub-blocks in the array coupled to a last column of the array, the last column being on the opposite side of the array to the first column;
- and
- priority encoder logic coupled to each sub-block in the last column in the array which outputs the results of the operation in order of priority.
A Content Addressable Memory comprising:
- an array of content addressable sub-blocks, each sub-block in a first column of the array coupled to a plurality of data inputs for receiving data, data received by a sub-block in a row in the first column of the array being propagated across the array to each subsequent sub-block in the row of the array, each sub-block comprising:
- a plurality of cell arrays;
- a dummy word which latches the result of the operation in each cell array;
- and
- a priority encoder that receives the latched results and outputs the highest priority match output for the result of the operation in the plurality of cell arrays;
- and
- a plurality of outputs for forwarding results of an operation in rows of sub-blocks in the array coupled to a last column of the array, the last column being on the opposite side of the array to the first column.
A Content Addressable Memory comprising:
- an array of content addressable sub-blocks, each sub-block in a first column of the array coupled to a plurality of data inputs for receiving data and search results from a first Content Addressable memory, data received by a sub-block in a row in the first column of the array being propagated across the array to each subsequent sub-block in the row of the array;
- and
- a plurality of outputs for forwarding results of an operation in rows of sub-blocks in the array coupled to a last column of the array, the last column being on the opposite side of the array to the first column, the results of the operation being forwarded to a second Content Addressable memory.
A Content Addressable Memory comprising:
- an array of content addressable sub-blocks, each sub-block in a first column of the array coupled to a plurality of data inputs for receiving data, data received by a sub-block in a row in the first column of the array being propagated across the array to each subsequent sub-block in the row of the array, each sub-block comprising:
- a plurality of cell arrays, each cell array including a plurality of Content Addressable Memory cells, match lines from CAM cells in a row of CAM cells coupled to provide a match indication for a word stored in a row, the match line being pre-charged to a voltage level at the beginning of an operation;
- and
- a plurality of outputs for forwarding results of an operation in rows of sub-blocks in the array coupled to a last column of the array, the last column being on the opposite side of the array to the first column.
Dependencies are inferred from the claim text.