Image processing apparatus

An image processing apparatus for sensing an image and for generating and transmitting data representing the image comprising:

• a plurality of sensor chips connected to one another and whose imaging regions are positioned relative to each other so as to collectively receive a continuous image extending over multiple ones of said sensor chips without an insensitive region therebetween caused by circuit wiring, each of said plurality of sensor chip including:
• an imaging region;
• a first readout circuit;
• a second readout circuit;
• a first output unit;
• and
• a second output unit,
• wherein said plurality of sensor chips are formed on the same semiconductor chip,
• wherein each imaging region of each of said plurality of sensor chips has a first imaging region and a second imaging region, each having a plurality of pixels arranged in a main scanning direction,
• wherein said first readout circuit of each of said plurality of sensor chips is configured to selectively read a signal from each of said plurality of pixels in said first imaging region of the sensor chip to which said first readout circuit belongs,
• wherein said second readout circuit of each of said plurality of sensor chips is conflaured to selectively read a signal from each of said plurality of pixels in said second imaging region of the sensor chip to which said second readout circuit belongs,
• wherein said first output unit of each of said plurality of sensor chips is configured to output the signal read by said first readout circuit of the sensor chip to which said first output unit belongs, and
• wherein said second output unit of each of said plurality of sensor chips is configured to output the signal read by said second readout circuit of the sensor chip to which said second output unit belongs;
• a first output line provided outside said plurality of sensor chips, to which signals from each first pixel row in each of said plurality of sensor chips is read through each of said first readout circuits and each of said first output units of said plurality of sensor chips;
• and
• a second output line provided outside said plurality of sensor chips, to which a signals from each second pixel row in each of said plurality of sensor chips is read through each of said second readout circuits and each of said second output units of said plurality of sensor chips;
• a driving circuit, which drives said plurality of sensor chips to sequentially output signals to said first output line and said second output line from said first output unit and said second output unit, respectively;
• and
• a combining circuit provided outside said plurality of sensor chips, which selectively outputs the signals from said first output line and said second output line, wherein said combining circuit is common to said plurality of sensor chips.