High rate running digital sum-restricted code

An encoder comprising:

• a user data word input for receiving a user data word;
• a code word output for producing a respective code word;
• a mapping block, which maps the user data word to a plurality of data segments that are constrained to a first number of bit patterns, which is less than a second number of bit patterns that satisfy a first constraint;
• a first encoder, which encodes each data segment into an intermediate code word segment selected from a first set of the bit patterns that satisfy the first constraint, wherein at least some of the bit patterns in the first set violate a second constraint;
• and
• a second encoder, which encodes the intermediate code word segments into respective code word segments by encoding the intermediate code word segments that violate the second constraint into code word segments selected from a second, different set of the bit patterns that satisfy the first constraint and the second constraint.