Frequency locked loop

A microcontroller integrated circuit, comprising:

• a terminal;
• a crystal oscillator circuit coupled to the terminal, the crystal oscillator circuit outputting a first clock signal of a first frequency;
• a real time clock that receives the first clock signal;
• a processor having a clock input lead;
• and
• a clock multiplier circuit having an input lead and an output lead, the clock multiplier circuit receiving the first clock signal from the crystal oscillator circuit and generating therefrom a second clock signal, the second clock signal having a second frequency that is a multiple of the first frequency, wherein the second clock signal is supplied to the clock input lead of the processor, wherein the clock multiplier circuit includes a frequency locked loop, the frequency locked loop including a digital filter, wherein the frequency locked loop frequency locks a first signal with respect to a second signal, the frequency locked loop further including a ramp generator, wherein the ramp generator starts a first ramp upon a first edge of the first signal, and wherein a first digital value indicative of a magnitude of the first ramp is determined upon a first edge of the second signal, and wherein the ramp generator starts a second ramp upon a second edge of the first signal, and wherein a second digital value indicative of a magnitude of the second ramp is determined upon a second edge of the second signal, the first and second digital values being used to generate a third digital value, the third digital value being supplied to the digital filter.