US 7,002,405 B2Granted

Linear low noise transconductance cell

AssigneeBroadcom Corporation

InventorsTodd Brooks, Jungwoo Song, Wynstan Tong

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Abstract

A low noise transconductance cell includes a resistor and a differential circuit pair having two equivalent half-circuits. Each half-circuit includes a feedback loop coupled to the resistor. The feedback loop includes an input transistor coupled to an inverting gain stage. The inverting gain stage is coupled to an output transistor which in turn is coupled to the input transistor and the resistor. In a low noise transconductance cell, a bias current source is coupled to the center of series connected resistors. In a high swing transconductance cell, a first bias current source is coupled to the left terminal of a resistance stage and a second bias current source is coupled to the right terminal of the resistance stage. The resistance stage can include a single resistor or a plurality of resistors.

Claims50

Dependent claims

A transconductance cell comprising:

a first resistor having a first terminal and a second terminal;
a first half-circuit including:
a first feedback loop wherein the first feedback loop includes a first input transistor receiving a first input voltage at its gate and having a source coupled to the first terminal of the first resistor, a first output transistor having a source coupled to the first terminal of the first resistor, and an inverter stage having an input coupled to a drain of the first input transistor and an output coupled to a gate of the first output transistor, wherein the first output transistor provides a first output current at its drain
wherein the operation of the first feedback loop causes VGS of the first input transistor to remain substantially constant;
and
a second half-circuit including:
a second feedback loop wherein the second feedback loop includes a second input transistor receiving a second input voltage at its gate and having a source coupled to the second terminal of the first resistor, a second output transistor having a source coupled to the second terminal of the first resistor, and an inverter stage having an input coupled to a drain of the second input transistor and an output coupled to a gate of the second output transistor, wherein the second output transistor provides a second output current at its drain
wherein the operation of the second feedback loop causes VGS of the second input transistor to remain substantially constant.

5 more elements

A transconductance cell comprising:

a first half-circuit including:
a first resistor, and
a first feedback loop wherein the first feedback loop includes a first input transistor receiving a first input voltage at its gate, a first output transistor having a source coupled to a source of the first input transistor and a first terminal of the first resistor, and an inverter stage having an input coupled to a drain of the first input transistor and an output coupled to a gate of the first output transistor, wherein the first output transistor provides a first output current at its drain
wherein the operation of the first feedback loop causes VGS of the first input transistor to remain substantially constant;
and
a second half-circuit including:
a second resistor having a first terminal coupled to a second terminal of the first resistor, and
a second feedback loop wherein the second feedback loop includes a second input transistor receiving a second input voltage at its gate, a second output transistor having a source coupled to a source of the second input transistor and a second terminal of the second resistor, and an inverter stage having an input coupled to a drain of the second input transistor and an output coupled to a gate of the second output transistor, wherein the second output transistor provides a second output current at its drain,
wherein the operation of the second feedback loop causes VGS of the second input transistor to remain substantially constant.

6 more elements

An analog circuit comprising:

a low noise transconductance cell having a first output node and a second output node, wherein the low noise transconductance cell comprises:
a first half-circuit including:
a first resistor, and
a feedback loop wherein the feedback loop includes a first input transistor receiving a first input voltage at its gate, a first output transistor having a source coupled to a source of the first input transistor and a first terminal of the first resistor, and an inverter stage having an input coupled to a drain of the first input transistor and an output coupled to a gate of the first output transistor, wherein the first output transistor provides a first output current at its drain;
a second half-circuit including:
a second resistor having a first terminal coupled to a second terminal of the first resistor, and
a feedback loop wherein the feedback loop includes a second input transistor receiving a second input voltage at its gate, a second output transistor having a source coupled to a source of the second input transistor and a second terminal of the second resistor, and an inverter stage having an input coupled to a drain of the second input transistor and an output coupled to a gate of the second output transistor, wherein the second output transistor provides a second output current at its drain;
and
a bias current source coupled to the second terminal of the first resistor and the first terminal of the second resistor;
a high swing transconductance cell having a first output node and a second output node;
and
an output switch having a first input node coupled to the first output node of the low noise transconductance cell, a second input node coupled to the second output node of the low noise transconductance cell, a third input node coupled to the first output node of the high swing transconductance cell, and a fourth input node coupled to the second output node of the high swing transconductance cell,
wherein a first and a second output node of the output switch are coupled to the first and second input nodes of the output switch when the low noise transconductance cell is selected and the first and second output nodes of the output switch are coupled to the third and fourth input nodes of the output switch when the high swing transconductance cell is selected.

10 more elements

A transconductance cell comprising:

a first half-circuit including:
a first feedback loop wherein the first feedback loop includes a first input transistor receiving a first input voltage at its gate and having a source, a first output transistor having a source coupled to the source of the first input transistor, and an inverter stage having an input coupled to a drain of the first input transistor and an output coupled to a gate of the first output transistor, wherein the first output transistor provides a first output current at its drain
wherein the operation of the first feedback loop causes VGS of the first input transistor to remain substantially constant;
a second half-circuit including:
a second feedback loop wherein the second feedback loop includes a second input transistor receiving a second input voltage at its gate and having a source, a second output transistor having a source coupled to the source of the second input transistor, and an inverter stage having an input coupled to a drain of the second input transistor and an output coupled to a gate of the second output transistor, wherein the second output transistor provides a second output current at its drain
wherein the operation of the second feedback loop causes VGS of the second input transistor to remain substantially constant;
and
a plurality of switchable resistance stages.

5 more elements

A transconductance cell comprising:

a first resistance stage, wherein the first resistance stage includes:
a first resistor having a first and a second terminal,
a second resistor having a first and a second terminal, and
a first switch wherein a first terminal of the first switch is coupled to the second terminal of the first resistor and a second terminal of the first switch is coupled to the second terminal of the second resistor;
a second resistance stage, wherein the second resistance stage includes:
a third resistor having a first and a second terminal,
a fourth resistor having a first and a second terminal, and
a second switch wherein a first terminal of the second switch is coupled to the second terminal of the third resistor and a second terminal of the second switch is coupled to the second terminal of the fourth resistor;
and
a first feedback loop coupled to the first terminal of the third resistor and the first terminal of the first resistor;
a second feedback loop coupled to the first terminal of the fourth resistor and the first terminal of the second resistor;
a first current source coupled to a first terminal of a third switch;
and
a second current source coupled to a first terminal of a fourth switch,
wherein a second terminal of the third switch is coupled to the first feedback loop and a third terminal of the third switch is coupled to the second terminal of the first resistor in the first resistance stage, and
wherein a second terminal of the fourth switch is coupled to the second feedback loop and a third terminal of the fourth switch is coupled to the second terminal of the second resistor in the second resistance stage.

13 more elements

Dependencies are inferred from the claim text.

Facts

Application: 10/777,629Filed 13 Feb 2004 · us provisional application
Priority: 14 Feb 2003
Published: US 2004/0160245 A119 Aug 2004
Granted: 21 Feb 2006
Term ends: Not estimatedThe source records don’t support an estimate.

Classification12 codes

H03F 3/45183
Using MOSFET transistors as the active amplifying circuit: long tailed pairs
H03K 5/2481
Using field effect transistors: with at least one differential stage
H03F 2203/45352
Indexing scheme relating to differential amplifiers: the AAC comprising a combination of a plurality of transistors, e.g. Darlington coupled…
H03F 2203/45356
Indexing scheme relating to differential amplifiers: the AAC comprising one or more op-amps, e.g. IC-blocks