Basic stage for a charge pump circuit

A basic stage for a charge pump circuit having at least an input terminal and an output terminal and comprising:

• at least a first inverter inserted between the input and output terminals and comprising a first complementary pair of transistors, defining a first internal node,
• at least a second inverter inserted between the input and output terminals and comprising a second complementary pair of transistors defining a second internal node,
• respective first and second capacitors connected to the first and second internal nodes and receiving first and second driving signals;
• wherein the first and second pairs of transistors having their respective control terminals cross-connected to the second and first internal nodes, wherein the basic stage also comprises at least a first biasing structure connected to the first and second internal nodes and comprising first and second biasing transistors, which are respectively coupled to the first and second inverters;
• and
• wherein the basic stage is configured for a negative charge pump circuit by applying a first biasing signal to bulk terminals of the first and second biasing transistors and first transistors of the first and second inverters, and by applying a second biasing signal to bulk terminals of third and fourth biasing transistors and second transistors of the first and second inverters, and applying the second biasing signal to well terminals of the first and second biasing transistors, the third and fourth biasing transistors being coupled to the second transistors of the first and second inverters, respectively, and the first transistors of the first and second inverters being formed in a triple-well technology and being coupled to a supply voltage reference.

A basic stage for a charge pump circuit having at least an input terminal and an output terminal and comprising:

• at least a first inverter inserted between the input and output terminals and comprising a first complementary pair of transistors, defining a first internal node,
• at least a second inverter inserted between the input and output terminals and comprising a second complementary pair of transistors defining a second internal node,
• respective first and second capacitors connected to the first and second internal nodes and receiving first and second driving signals;
• the first and second pairs of transistors having their respective control terminals cross-connected to the second and first internal nodes, wherein the basic stage also comprises at least a first biasing structure connected to the first and second internal nodes and comprising first and second biasing transistors, which are respectively coupled to the first and second inverters;
• and
• wherein the basic stage is configured for a negative charge pump circuit by applying a first biasing signal to bulk terminals of the first and second biasing transistors and first transistors of the first and second inverters, and by applying a ground voltage reference signal to bulk terminals of third and fourth biasing transistors, to second transistors of the first and second inverters, and to well terminals of the first and second biasing transistors, the third and fourth biasing transistors being coupled to the second transistors of the first and second inverters, respectively, and the first transistors of the first and second inverters being formed in a triple-well technology and being coupled to a supply voltage reference.