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US 7,002,224 B2Granted
Transistor with doped gate dielectric
AssigneeInfineon Technologies AG
InventorHong-Jyh Li
Life of this patent
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Abstract
A transistor and method of manufacture thereof. A semiconductor workpiece is doped before depositing a gate dielectric material. Using a separate anneal process or during subsequent anneal processes used to manufacture the transistor, dopant species from the doped region of the workpiece are outdiffused into the gate dielectric, creating a doped gate dielectric. The dopant species fill vacancies in the atomic structure of the gate dielectric, resulting in a transistor having increased speed, reduced power consumption, and improved voltage stability.
Claims25
A transistor, comprising:
- a workpiece;
- a doped region disposed in the workpiece, the doped region including a dopant species;
- a doped gate dielectric disposed over the doped region of the workpiece, the doped gate dielectric including the dopant species, wherein the doped gate dielectric comprises about 50 Å or less of Si3N4, Al2O3, Ta2O5, HfO2, TiO2 HfSiOx, ZrO2, or ZrSiOx;
- a gate disposed over the gate dielectric;
- and
- a source region and a drain region formed in at least the doped region of the workpiece, wherein the source region, drain region, gate, and doped gate dielectric comprise a transistor.
3 more elements
A transistor, comprising:
- a workpiece;
- a doped region disposed in the workpiece, the doped region including a dopant species, wherein the dopant species comprises fluorine;
- a doped gate dielectric disposed over the doped region of the workpiece, the doped gate dielectric including the dopant species;
- a metal gate disposed over the gate dielectric;
- and
- a source region and a drain region formed in at least the doped region of the workpiece, wherein the source region, drain region, gate, and doped gate dielectric comprise a transistor.
3 more elements
A transistor, comprising:
- a workpiece;
- a doped region disposed in the workpiece, the doped region including a dopant species;
- a doped gate dielectric disposed over the doped region of the workpiece, the doped gate dielectric including the dopant species, wherein the doped gate dielectric comprises about 50 Å or less of Si3N4, Al2O3, Ta2O5, HfO2, TiO2 HfSiOx, ZrO2, or ZrSiOx;
- a metal gate disposed over the gate dielectric;
- and
- a source region and a drain region formed in at least the doped region of the workpiece, wherein the source region, drain region, gate, and doped gate dielectric comprise a transistor.
3 more elements
Dependencies are inferred from the claim text.