High-density SOI cross-point memory array and method for fabricating same
AssigneeSharp Laboratories of America, Inc.
InventorSheng Teng Hsu
Life of this patent
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Abstract
A method for fabricating a high-density silicon-on-insulator (SOI) cross-point memory array and an array structure are provided. The method comprises: selectively forming a hard mask on an SOI substrate, defining memory areas, active device areas, and top electrode areas; etching to remove the exposed silicon (Si) surfaces; selectively forming metal sidewalls adjacent the hard mask; filling the memory areas with memory resistor material; removing the hard mask, exposing the underlying Si active device areas; forming an overlying layer of oxide; etching the oxide to form contact holes to the active device areas; forming diodes in the contact holes; and, forming bottom electrode lines overlying the diodes.
Claims21
A method for fabricating a high-density silicon-on-insulator (SOI) cross-point memory array, the method comprising:
- selectively forming a hard mask on an SOI substrate, defining memory areas, active device areas, and top electrode areas;
- etching to remove exposed silicon (Si) surfaces;
- selectively forming metal sidewalls adjacent the hard mask;
- filling the memory areas with memory resistor material;
- removing the hard mask, exposing the underlying Si active device areas;
- forming an overlying layer of oxide;
- etching the oxide to form contact holes to the active device areas;
- forming diodes in the contact holes;
- forming bottom electrode lines overlying the diodes;
- and,
- wherein forming diodes in the contact holes includes forming a diode between a bottom electrode line and a plurality of memory areas, through a single intervening diode.
A method for fabricating a high-density silicon-on-insulator (SOI) cross-point memory array, the method comprising:
- selectively forming a hard mask on an SOI substrate, defining memory areas, active device areas, and top electrode areas;
- etching to remove exposed silicon (Si) surfaces;
- selectively forming metal sidewalls adjacent the hard mask;
- filling the memory areas with memory resistor material;
- removing the hard mask, exposing the underlying Si active device areas;
- forming an overlying layer of oxide;
- etching the oxide to form contact holes to the active device areas;
- forming diodes in the contact holes, including a single intervening diode in a contact hole between a bottom electrode line and a plurality of memory areas;
- and,
- forming bottom electrode lines overlying the diodes.
Dependencies are inferred from the claim text.