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US 7,001,834 B2Granted
Integrated circuit and method of manufacturing an integrated circuit and package
AssigneeAgilent Technologies, Inc.
InventorsNurwati S Devnani, James Oliver Barnes, Charles E Moore, Benny W H Lai
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Abstract
A packaged IC includes an IC die with signal and signal complement traces positioned relative to each other to maximize broadside coupling for a matching impedance. The signal and signal complement traces are electrically connected to transmission or receive channels of the IC die. Use of a broadside coupled trace configuration alleviates routing congestion in an IC package and permits an IC to accommodate a greater number of channels within a given surface area than is possible under the prior art.
Claims9
A method of manufacturing a packaged IC comprising the steps of:
- calculating trace width and spacing requirements of one or more signal and signal complement traces for a matching impedance at a given dielectric constant using broadside coupling in an IC package design,
- positioning said one or more signal and signal complement traces to maximize broadside coupling according to said step of calculating in the IC package design,
- positioning one or more signal and signal complement trace conductive reference layers parallel to said signal and signal complement traces separated by signal and signal complement trace dielectric isolation layers in the IC package design,
- manufacturing an IC package according to said IC package design, and
- electrically connecting pads on an IC die to said signal and signal complement traces of said IC package.
2 more elements
Dependencies are inferred from the claim text.