Loading patent…
AssigneeAdvanced Micro Devices, Inc.
InventorsKhoi A. Phan, Bharath Rangarajan, Bhanwar Singh
Estimating the term…
The present invention relates to inspection methods and systems utilized to provide a best means for inspection of a wafer. The methods and systems include wafer-to-reticle alignment, layer-to-layer alignment and wafer surface feature inspection. The wafer-to-reticle alignment is improved by the addition of diagonal lines to existing alignment marks to decrease the intersection size and corresponding area that a desired point can reside. Layer-to-layer alignment is improved in a similar manner by the addition of oblique and/or non-linear line segments to existing overlay targets. Also, providing for wafer surface inspection in a multitude of desired diagonal axes allows for more accurate feature measurement.
A system for aligning a wafer to a reticle, comprising:
A system for aligning two or more wafer layers, comprising:
A method for facilitating wafer alignment comprising the steps of:
A method for facilitating wafer alignment, comprising the steps of:
A method of aligning a wafer and measuring overlay error, the method comprising:
A wafer fabrication system employing the system of 17.
Dependencies are inferred from the claim text.