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US 7,001,801 B2Granted
Method of manufacturing semiconductor device having first and second insulating films
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorsShunpei Yamazaki, Hideomi Suzawa, Hirokazu Yamagata
Life of this patent
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Abstract
In order to increase an aperture ratio, a part of or all of a gate electrode that overlaps with channel formation regions (213, 214) of a pixel TFT is caused to overlap with second wirings (source line or drain line) (154, 157). Additionally, a first interlayer insulating film (149) and a second interlayer insulating film (150c) are disposed between the gate electrode and the second wirings (154, 157) so as to decrease a parasitic capacitance.
Claims51
A method of manufacturing a semiconductor device including at least one TFT on an insulating surface, said method comprising:
- forming an active layer on the insulating surface;
- forming a gate insulating film on said active layer;
- introducing an n-type impurity element or a p-type impurity element into a portion of said active layer, thereby forming a source region or a drain region;
- forming a first interlayer insulating film over a gate wiring and a gate electrode;
- forming a second interlayer insulating film on said first interlayer insulating film;
- etching said second interlayer insulating film, thereby eliminating said second interlayer insulating film disposed over said source region or said drain region;
- etching said first interlayer insulating film and said gate insulating film, thereby forming a contact hole that reaches said source region or said drain region;
- and
- forming a wiring in contact with said source region or said drain region, said wiring disposed on said second interlayer insulating film that overlaps with said gate electrode.
6 more elements
A method of manufacturing a semiconductor device including at least a pixel circuit and driving circuit for controlling said pixel circuit, each disposed on a same substrate, said method comprising:
- forming an active layer on an insulating surface;
- forming a gate insulating film on said active layer;
- forming a gate wiring and a gate electrode on said gate insulating film;
- adding an n-type impurity element or a p-type impurity element to a part of said active layer, thereby forming an n-type impurity region or a p-type impurity region;
- forming a first interlayer insulating film over said gate wiring and said gate electrode;
- selectively forming a second interlayer insulating film on said first interlayer insulating film that overlaps with said gate electrode;
- etching said first interlayer insulating film and said gate insulating film, thereby forming a contact hole that reaches said n-type impurity region or said p-type impurity region;
- and
- forming a wiring in contact with said n-type impurity region or said p-type impurity region, said wiring disposed on said second interlayer insulating film that overlaps with said gate electrode.
6 more elements
A method of manufacturing a semiconductor device including at least a pixel circuit and driving circuit for controlling said pixel circuit, each disposed on a same substrate, said method comprising:
- forming an active layer on an insulating surface;
- forming a gate insulating film on said active layer;
- forming a gate wiring and a gate electrode on said gate insulating film;
- introducing an n-type impurity element or a p-type impurity element into a portion of said active layer, thereby forming an n-type impurity region or a p-type impurity region;
- forming a first interlayer insulating film over said gate wiring and said gate electrode;
- etching said first interlayer insulating film and said gate insulating film, thereby forming a contact hole that reaches said n-type impurity region or said p-type impurity region;
- selectively forming a second interlayer insulating film on said first interlayer insulating film;
- and
- forming a wiring in contact with said n-type impurity region or said p-type impurity region, said wiring disposed on said second interlayer insulating film that overlaps with said gate electrode.
6 more elements
A method of manufacturing a semiconductor device comprising:
- forming a thin film transistor over a substrate, the thin film transistor comprising an active layer and a gate electrode with a gate insulating film interposed therebetween;
- forming a first interlayer insulating film over the gate electrode;
- forming a second interlayer insulating film on said first interlayer insulating film;
- etching said second interlayer insulating film;
- etching said first interlayer insulating film and said gate insulating film to form a contact hole that reaches said active layer;
- forming a wiring in contact with said active layer, wherein said wiring is formed on said second interlayer insulating film, and wherein said wiring overlaps with said gate electrode;
- forming a third interlayer insulating film over the wiring;
- and
- forming a pixel electrode in contact with the wiring, wherein said pixel electrode is formed on the third interlayer insulating film.
6 more elements
A method of manufacturing a semiconductor device comprising:
- forming a thin film transistor over a substrate, the thin film transistor comprising an active layer and a gate electrode with a gate insulating film interposed therebetween;
- forming a first interlayer insulating film over the gate electrode;
- selectively forming a second interlayer insulating film on said first interlayer insulating film, wherein said second interlayer insulating film overlaps with said gate electrode;
- etching said first interlayer insulating film and said gate insulating film to form a contact hole that reaches said active layer;
- forming a wiring in contact with said active layer, wherein said wiring is formed on said second interlayer insulating film, and wherein said wiring overlaps with said gate electrode;
- forming a third interlayer insulating film over the wiring;
- and
- forming a pixel electrode in contact with the wiring, wherein said pixel electrode is formed on the third interlayer insulating film.
5 more elements
A method of manufacturing a semiconductor device comprising:
- forming a thin film transistor over a substrate, the thin film transistor comprising an active layer and a gate electrode with a gate insulating film interposed therebetween;
- forming a first interlayer insulating film over the gate electrode;
- etching said first interlayer insulating film and said gate insulating film to form a contact hole that reaches said active layer;
- selectively forming a second interlayer insulating film on said first interlayer insulating film;
- forming a wiring in contact with said active layer, wherein said wiring is formed on said second interlayer insulating film, and wherein said wiring overlaps with said gate electrode;
- forming a third interlaver insulating film over the wiring;
- and
- forming a pixel electrode in contact with the wiring, wherein said pixel electrode is formed on the third interlayer insulating film.
5 more elements
Dependencies are inferred from the claim text.