Ultra-linear multi-channel field effect transistor

A field effect transistor (FET) comprising:

• a substrate, a source, a gate and a drain;
• multiple channels in said substrate between said drain and said source to improve the linearity of drain current vs drain voltage characteristics when a gate voltage exceeding the threshold voltage is avplied at the gate,
• said multiple channels having alternating layers of undoned layers of first kind of semiconductor and doped layers of second kind of semiconductor, and
• said doped layers having doping concentrations which decrease with depth from said gate,
• wherein the channels are selected from the group consisting of uniformly doped, delta doped, spiked doped, InAs sub-well, TIP (TIAs) sub-well, InN sub-well and InAs, TIP, TIAs, InN self-assembled quantum dots for III-V compound semiconductors, and
• wherein the channels are selected from the group consisting of uniformly doped, delta coped, spiked doped, Ge sub-well, Sn sub-well and self assembled quantum dots selected from the group consisting of Ge and Sn for IV—IV compound semiconductors;
• a Schottky layer and a cap over said multiple channels and support said source, said drain and said gate;
• and
• layers of oxidation banier between the Schottky barrier and the cap layer, selected from the group consisting of:
• undoped AlGaAs layer, undoped GaAs layer, undoped AlGaSb layer, undoped AlInAs layer, undoped layers of AlInAs and GaAs.