Lanthanide oxide/zirconium oxide atomic layer deposited nanolaminate gate dielectrics

A semiconductor capacitor comprising:

• a first electrode;
• a second electrode, and
• a dielectric layer separating the first and the second electrodes, the dielectric layer being a composite laminate dielectric layer comprising a first layer of ZrO2 having a thickness of about 1–2 nm, and a second layer of lanthanide oxide.

A semiconductor memory device comprising:

• a capacitor that includes a first dielectric material separating a first and a second electrode;
• a transistor that includes a second dielectric material beneath a gate electrode and between a source and a drain region, and
• at least one of the first and second dielectric materials is a composite laminate dielectric layer comprised of a first layer of material selected from the group consisting of ZrO2 and lanthanide oxide and a second layer of material selected from the group consisting of ZrO2 and a lanthanide oxide on the first layer of material, the second layer of material being different from the first layer of material, wherein the lanthanide oxide layer has a thickness of about 2–12 nm.

A semiconductor capacitor comprising:

• a first electrode;
• a second electrode, and
• a dielectric layer separating the first and the second electrodes, the dielectric layer being a composite laminate dielectric layer comprising a first layer of ZrO2 and a second layer of lanthanide oxide having a thickness of about 2–4 nm.

A semiconductor capacitor comprising:

• a first electrode;
• a second electrode, and
• a dielectric layer separating the first and the second electrodes, the dielectric layer being a composite laminate dielectric layer having a thickness of about 9 nm comprising a first layer of ZrO2 having a thickness of about 1–6 nm and a second layer of lanthanide oxide.

A semiconductor memory device comprising:

• a capacitor that includes a first dielectric material separating a first and a second electrode;
• a transistor that includes a second dielectric material beneath a gate electrode and between a source and a drain region, and
• at least one of the first and second dielectric materials is a composite laminate dielectric layer having a thickness of about 3–18 nm comprised of a first layer of material selected from the group consisting of ZrO2 and lanthanide oxide and a second layer of material selected from the group consisting of ZrO2 and a lanthanide oxide on the first layer of material, the second layer of material being different from the first layer of material, wherein the ZrO2 layer has a thickness of about 1–6 nm.

A semiconductor capacitor comprising:

• a first electrode;
• a second electrode, and
• a dielectric layer separating the first and the second electrodes, the dielectric layer being a composite laminate dielectric layer having a thickness of about 9 nm comprising a first layer of ZrO2 and a second layer of lanthanide oxide having a thickness of about 2–4 nm.

A semiconductor memory device comprising:

• a capacitor that includes a first dielectric material separating a first and a second electrode;
• a transistor that includes a second dielectric material beneath a gate electrode and between a source and a drain region, and
• at least one of the first and second dielectric materials is a composite laminate dielectric layer having a thickness of about 3–18 nm comprised of a first layer of material selected from the group consisting of ZrO2 and lanthanide oxide and a second layer of material selected from the group consisting of ZrO2 and a lanthanide oxide on the first layer of material, the second layer of material being different from the first layer of material, wherein the lanthanide oxide layer has a thickness of about 2–12 nm.