Semiconductor device having both memory and logic circuit and its manufacture

Abstract

A gate insulating film is formed on the principal surface of a semiconductor substrate. A silicon film is formed on the gate insulating film. Impurities are doped in the silicon film. In this case, impurities are doped into the silicon film to make a region of the silicon film in the memory cell area have a first impurity concentration and to make a region of the silicon film in the logic circuit area have a second impurity concentration lower than the first impurity concentration. The doped silicon film is patterned. In this case, the silicon film is patterned to leave word lines having the first impurity concentration and serving as gate electrodes in the memory cell area and to leave gate electrodes having the second impurity concentration in the logic circuit area. Source/drain regions of MISFET's are formed in a surface layer of the semiconductor substrate by doping impurities into regions on both sides of each word line in the memory cell area and into regions on both sides of each gate electrode in the logic circuit. The electrical characteristics of the logic circuit area can be improved while the data storage characteristics of memory cells are maintained good.

Dependencies are inferred from the claim text.