Back to results
US 6,986,052 B1Granted
Method and apparatus for secure execution using a secure memory partition
AssigneeIntel Corporation
InventorMillind Mittal
Life of this patent
Estimating the term…
Abstract
A processor capable of secure execution. The processor contains an execution unit and secure partition logic that secures a partition in memory. The processor also contains cryptographic logic coupled to the execution unit that encrypts and decrypts secure data and code.
Claims19
An apparatus, comprising:
- an execution unit that is part of a processor;
- secure partition enforcement logic coupled to the execution unit, wherein the secure partition enforcement logic is part of the processor;
- and
- a cryptographic logic element coupled to the execution unit, wherein the cryptographic logic is part of the processor.
1 more element
A computer system, comprising:
- a first memory;
- and
- a processor that is coupled to the first memory and includes secure partition enforcement logic to establish a partition of virtual memory locations.
A method of processing an instruction, comprising:
- examining an instruction prior to execution of the instruction;
- and
- determining to not execute the instruction when the instruction is an unauthorized access to a location within a partition of locations in virtual memory.
A method of processing an instruction, the method comprising:
- reading an encrypted instruction into a processor from a secure partition in a memory;
- decrypting the instruction read;
- and
- executing the decrypted instruction.
1 more element
Dependencies are inferred from the claim text.