Digitally controlled transconductance cell
AssigneeScintera Networks, Inc.
InventorsJishnu Bhattacharjee, Debanjan Mukherjee, Abhijit Phanse
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Abstract
A digitally controlled transconductance cell includes a differential transistor pair coupled to load elements (either passive or active with resistive or impedance loads) and a variable bias current source, where the transconductance or gain is digitally varied by changing the aspect ratio of the transistors and the bias current.
Claims28
A method of varying transconductance of a transconductance cell, wherein the cell comprises a first and a second load element, a first transistor coupled to the first load element, a second transistor coupled to the second load element, and a current source coupled to both the first and second transistors, the method comprising:
- varying the size of the first and second transistors;
- and
- varying a bias current from the current source.
A programmable transconductance cell, comprising:
- a voltage source;
- a differential transistor pair comprising a variable sized first transistor and a variable sized second transistor;
- a first load element coupled between the voltage source and the first transistor;
- a second load element coupled between the voltage source and the second transistor;
- and
- a variable current source coupled to the source of the first and second transistors.
An N-stage transconductance circuit, comprising:
- a voltage source;
- a first programmable transconductance cell coupled to the voltage source, the cell comprising:
- a first differential transistor pair comprising a variable sized first transistor and a variable sized second transistor, wherein the gate of the first and second transistor are configured to receive differential input signals;
- a first load element coupled between the voltage source and the first transistor;
- a second load element coupled between the voltage source and the second transistor;
- and
- a first variable current source coupled to the source of the first and second transistors, wherein a first differential output signal of the circuit is received from the drain of the first and second transistors;
- and
- a control circuit for varying a current in the current source and the size of the first and second transistors.
Dependencies are inferred from the claim text.