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AssigneeSRC Computers, Inc.
InventorsDaniel Poznanovic, Jeffrey Hammes, Lisa Krause, Jon Steidel, David Barker, Jeffrey Paul Brooks
Estimating the term…
A system and method for compiling computer code written to conform to a high-level language standard to generate a unified executable containing the hardware logic for a reconfigurable processor, the instructions for a traditional processor (instruction processor), and the associated support code for managing execution on a hybrid hardware platform. Explicit knowledge of writing hardware-level design code is not required since the problem can be represented in a high-level language syntax. A top-level driver invokes a standard-conforming compiler that provides syntactic and semantic analysis. The driver invokes a compilation phase that translates the CFG representation being generated into a hybrid controlflow-dataflow graph representation representing optimized pipelined logic which may be processed into a hardware description representation. The driver invokes a hardware description language (HDL) compiler to produce a netlist file that can be used to start the place-and-route compilation needed to produce a bitstream for the reconfigurable computer. The programming environment then provides support for taking the output from the compilation driver and combining all the necessary components together to produce a unified executable capable of running on both the instruction processor and reconfigurable processor.
A method of converting high-level language source code into a unified executable comprising:
A method of forming a unified executable comprising:
A system for forming a unified executable comprising:
A system for forming a unified executable that is executable on a hybrid reconfigurable hardware-instruction processor computer, said system comprising:
A computer program product comprising:
Dependencies are inferred from the claim text.