System and method for classifying defects in and identifying process problems for an electrical circuit

A method for performing defect analysis, comprising:

• detecting a pixel voltage output from a TFT array in response to a test signal;
• comparing the pixel voltage to at least one defect signal;
• classifying a defect in the array based on a result of the comparing step;
• and
• identifying a manufacturing process problem which caused the defect based on said defect classification, wherein the problem in the manufacturing process is identified by;
• comparing the defect classification to statistical information which links a plurality of predefined defect classifications to a plurality of corresponding manufacturing process problems.

A system for performing defect analysis, comprising:

• a signal generator which applies a test signal to a circuit;
• a detector which obtains a signal generated in response to the test signal;
• and
• a processor which compares the response signal to reference information, classifies a defect in the circuit based on a result of the comparison, and identifies a problem in a manufacturing process which caused the defect based on said defect classification, wherein the processor identifies the problem in the manufacturing process by;
• comparing the defect classification to statistical information which links a plurality of predefined defect classifications to a plurality of corresponding manufacturing process problems.

A method for performing defect analysis, comprising:

• detecting a pixel voltage output from a TFT array in response to a test signal;
• comparing the pixel voltage to at least one defect signal;
• classifying a defect in the array based on a result of the comparing step;
• and
• identifying a manufacturing process problem which caused the defect based on said defect classification, wherein the problem in the manufacturing process is automatically identified using a rules-based or knowledge-based system that associates the defect classification with one or more other defects that are likely to occur together.

A method for performing defect analysis, comprising:

• applying a test signal to a circuit;
• obtaining a signal generated in response to the test signal;
• comparing the response signal to reference information;
• classifying a defect in the circuit based on a result of the comparing step;
• and
• identifying a problem in a manufacturing process which caused the defect based on said defect classification, wherein the problem in the manufacturing process is automatically identified using a rules-based or knowledge-based system that associates the defect classification with one or more other defects that are likely to occur together.

A system for performing defect analysis, comprising:

• a signal generator which applies a test signal to a circuit;
• a detector which obtains a signal generated in response to the test signal;
• and
• a processor which compares the response signal to reference information, classifies a defect in the circuit based on a result of the comparison, and identifies a problem in a manufacturing process which caused the defect based on said defect classification, wherein the processor determines the problem in the manufacturing process by referencing a rules-based or knowledge-based system that automatically associates the defect classification with one or more other defects that are likely to occur together.