8B/10B encoding and decoding for high speed applications

A circuit for encoding, comprising:

• an 8B/10B encoder adapted to encode five-bit source vectors into six-bit coded vectors and encode three-bit source vectors into four-bit coded vectors, thereby creating 10-bit coded bytes from eight input bits;
• and
• a disparity circuit adapted to determine a starting disparity at a front of a coded byte based on a running disparity at a front of a preceding coded byte and a value of a single bit parameter which indicates whether the preceding coded byte is balanced.

A block encoder comprising:

• a plurality of 8B/10B encoders operating in parallel, each 8B/10B encoder encoding five-bit source vectors into six-bit coded vectors and encoding three-bit source vectors into four-bit coded vector, thereby creating 10-bit coded bytes from eight input bits;
• and
• a disparity circuit adapted to determine a starting disparity at a front of one of the 10-bit coded bytes based on a ruining disparity at a reference point, an odd or even number of coded bytes between the reference point and the one 10-bit coded byte and the odd or even number of balanced bytes between the reference point and the one 10-bit coded byte.

A method for detecting a disparity violation at a front of a byte for balanced binary codes that have a running disparity of plus or minus one at any byte boundary, the method comprising:

• determining a required front end disparity of the byte;
• and
• comparing the required front-end disparity of the byte with an actual running disparity by setting the actual running disparity equal to an exit disparity of a next preceding byte that is disparity dependent.

A circuit for decoding 10B/8B coded bytes, the circuit comprising:

• a 10B/8B decoder adapted to decode six-bit coded vectors into five-bit source vectors and decode four-bit coded vectors into three-bit source vectors, thereby creating eight-bit decoded bytes from 10-bit coded bytes;
• and
• a disparity circuit adapted to compare a required front-end disparity of a 10-bit coded byte with an actual running disparity by setting the actual running disparity equal to an exit disparity of a next preceding 10-bit coded byte that is disparity dependent.