Voltage regulator power management apparatus
AssigneeNational Semiconductor Corporation
InventorsJohn Patrick Fairbanks, Hidehiko Suzuki
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AssigneeNational Semiconductor Corporation
InventorsJohn Patrick Fairbanks, Hidehiko Suzuki
Estimating the term…
Quiescent currents in a circuit that includes a regulator are reduced by disabling selected portions of the circuit. A window comparator is selected activated to evaluate the input voltage such that a first operating mode is activated when the input voltage is within a predetermined voltage range and a second operating mode is activated when the input voltage is outside of the predetermined voltage range. The battery voltage is used a reference signal when the first mode is selected such that a voltage reference circuit can be disabled to reduce power, while the voltage reference circuit is enabled when the second mode is selected. Another comparator circuit is periodically activated to compare the reference signal to the output voltage. The regulator is disabled after the output voltage exceeds a first level. The output voltage collapses below a second level associated, the evaluation and regulation process is repeated.
An apparatus that is arranged to conserve power in a circuit that includes a regulator that provides an output voltage from an input voltage, the apparatus comprising:
An apparatus that is arranged to conserve power in a circuit that includes a regulator that provides an output voltage from an input voltage, the apparatus comprising:
A method of conserving power in a circuit that includes a regulator, wherein the regulator provides an output voltage from an input voltage, the method comprising:
Dependencies are inferred from the claim text.