High density chip carrier with integrated passive devices
AssigneeInternational Business Machines Corporation
InventorsMichael Patrick Chudzik, Robert H. Dennard, Rama Divakaruni, Bruce Kenneth Furman, Rajarao Jammy, Chandrasekhar Narayan, Sampath Purushothaman, Joseph F. Shepard, Jr., Anna Wanda Topol
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Abstract
A carrier for a semiconductor component is provided having passive components integrated in its substrate. The passive components include decoupling components, such as capacitors and resistors. A set of connections is integrated to provide a close electrical proximity to the supported components.
Claims29
A method of constructing a high density semiconductor chip carrier structure for interconnecting semiconductor components comprising the steps of:
- constructing a semiconductor substrate layer having at least one via constructed therein;
- forming a first interface layer on said substrate having a connection to at least one semiconductor component;
- forming a second interface layer on said substrate having a connection to a level of packaging, said first and second interface layers connected through said at least one via;
- and
- forming at least one passive component in said substrate layer, said passive component being connected to said first interface and to said second interface, said connection to said second interface being through said at least one via.
A method of constructing a high density semiconductor chip carrier structure for interconnecting semiconductor components comprising the steps of:
- constructing a first interface having a connection to at least one semiconductor component;
- constructing a second interface having a connection to a level of packaging;
- constructing a substrate layer between said first and second interfaces having at least one via to provide a path for connecting said connections of said first and second interfaces;
- and
- forming an array of trenches extending into said substrate layer from a surface thereof and adapted to function as components;
- and
- forming a set of conductive components associated with said first interface to interconnect said trench components and to connect said trench components to said at least one semiconductor component.
A method of constructing a high density semiconductor chip carrier structure for interconnecting semiconductor components comprising the steps of:
- constructing a first interface having a connection to at least one semiconductor component;
- constructing a second interface having a connection to a level of packaging;
- constructing a substrate layer between said first and second interfaces having at least one via to provide a path for connecting said connections of said first and second interfaces;
- and
- forming at least one memory cell in said substrate layer;
- and
- forming a set of conductive components associated with said first interface to connect said memory cell to said at least one semiconductor component.
A method of constructing a high density semiconductor chip carrier structure for interconnecting semiconductor components comprising the steps of:
- constructing a first interface having a connection to at least one semiconductor component;
- constructing a second interface having a connection to a level of packaging;
- constructing a substrate layer between said first and second interfaces having at least one via to provide a path for connecting said connections of said first and second interfaces;
- and
- forming at least one optoelectronic structure in said substrate layer;
- and
- forming a set of conductive components associated with said first interface to connect said optoelectronic structure to said at least one semiconductor component.
Dependencies are inferred from the claim text.