Diagnostic method for structural scan chain designs

A method of testing and diagnosing an integrated circuit comprising:

• providing logic circuits connected to a shift register latch chain, said shift register latch chain comprised of shift register latches;
• providing means for propagating a test pattern in said shift register latch chain through said logic circuits and into means for generating a test signature based a response of said logic circuits to said test pattern, said test pattern supplied from a source external to said integrated circuit;
• selectively gating the contents of said shift registers into said means for generation said test signature based upon selected test patterns;
• and
• gating the contents of a sequential group of shift register latches into said means for generating said test signature based upon a specified range of SRL chain load/unload cycles, said range of SRL chain load/unload cycles determined by a selectable start and a selectable stop count.

A method for testing and diagnosing broken or stuck-at shift register latch chains comprised of shift register latches, said shift register latch chains coupled to logic circuits in an integrated circuit, the method comprising in the order listed:

• (a) determining which of said shift register latch chains are failing propagating a first test pattern of zeros and ones through said shift register latch chains while gating which of said shift register latch chains contents are propagated into said means for generating a test signature, said determination of failing shift register latch chains made on the basis of said test signature;
• and
• (b) for each failing shift register latch chain;
• (b1) propagating a second test pattern through said shift register latch chains while allowing only the contents of a selected sequential group of shift register latches in a failing shift register latch to propagate into said means for generating a test signature;
• (b2) reducing the number of shift register latches in said sequential group of shift register latches;
• and
• (c3) repeating steps (b1) and (b2) until all failing shift register latches of the failing shift register latch chain have been determined, said determination of failing shift register latches made on the basis of said test signature.