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US 6,959,363 B2Granted
Cache memory operation
AssigneeSTMicroelectronics S.r.l.
InventorsTrefor Southwell, Peter Hedinger
Life of this patent
Estimating the term…
Abstract
A cache memory comprises a fetch engine arranged to issue fetch requests for accessing data items from locations in a main memory identified by access addresses in a program being executed, a pre-fetch engine controlled to issue pre-fetch requests for speculatively accessing pre-fetch data items from locations in said main memory identified by addresses which are determined as being a number of locations from respective ones of said access addresses, and a calibrator arranged to selectively vary said number of locations.
Claims36
A method of controlling a cache memory, the method comprising:
- issuing fetch requests for accessing data items from locations in a main memory identified by access addresses in a program being executed;
- issuing pre-fetch requests for speculatively accessing pre-fetch data items from locations in said main memory identified by addresses which are determined as being a number of locations from respective ones of said access addresses;
- selectively varying said number of locations at regular time intervals;
- and
- selectively discarding issued pre-fetch requests based on current running capacity of the main memory.
2 more elements
A system, comprising:
- a central processing unit configured to execute a program;
- a main memory;
- and
- a cache memory arranged between the central processing unit and the main memory, the cache memory including:
- a fetch engine arranged to issue fetch requests for accessing data items from locations in a main memory identified by access addresses in the program being executed;
- a pre-fetch engine controlled to issue pre-fetch requests for speculatively accessing pre-fetch data items from locations in said main memory identified by addresses which are determined as being a number of locations from respective ones of said access addresses;
- and
- a calibrator arranged to selectively vary said number of locations at regular time intervals, wherein the pre-fetch engine is controlled by machine-readable instruction arranged to override the calibrator.
5 more elements
An apparatus, comprising:
- a fetch engine arranged to issue fetch requests to access data items from locations in a memory identified by access addresses in a program being executed;
- a pre-fetch engine controlled to issue pre-fetch requests to speculatively access pre-fetch data items from locations in said memory identified by addresses which are determined as being a number of locations from respective ones of said access addresses;
- a calibrator arranged to selectively vary said number of locations at regular time intervals;
- and
- a storage device having an accessible storage area to hold data items and pre-fetch data items,
- wherein the calibrator includes:
- a used pre-fetch counter arranged to, during a given time interval, count a first number of pre-fetched data items accessed from the accessible storage area of the storage device;
- a discarded pre-fetch counter arranged to, during said given time interval, count a second number of pre-fetched data items not accessed from the accessible storage area and subsequently overwritten by storage of another data item or pre-fetch data item;
- a ratio calculator arranged to calculate the ratio of the second number to the first number;
- a comparator arranged to compare the calculated ratio to a first value;
- and
- an optimizer arranged to, if the calculated ratio is more than the first value, decrease the number of locations, and otherwise to increase the number of locations up to a second value.
9 more elements
An apparatus, comprising
- a fetch engine arranged to issue fetch requests to access data items from locations in a memory identified by access addresses in a program being executed;
- a pre-fetch engine controlled to issue pre-fetch requests to speculatively access pre-fetch data items from locations in said memory identified by addresses which are determined as being a number of locations from respective ones of said access addresses;
- a calibrator arranged to selectively vary said number of locations at regular time intervals;
- and
- a set associative cache having N rows,
- wherein before a pre-fetch data item is accessed from the memory, a busy bit is set for a row, to prevent that row from being used to store any other pre-fetch data items, and wherein if the pre-fetched data item has been accessed, that data item is stored in that row and the busy bit is re-set.
3 more elements
An apparatus, comprising:
- a fetch engine arranged to issue fetch requests to access data items from locations in a memory identified by access addresses in a program being executed;
- a pre-fetch engine controlled to issue pre-fetch requests to speculatively access pre-fetch data items from locations in said memory identified by addresses which are determined as being a number of locations from respective ones of said access addresses;
- a calibrator arranged to selectively vary said number of locations at regular time intervals;
- a storage device having an accessible storage area to hold data items and pre-fetch data items;
- and
- a tag array to receive pre-fetch requests, the tag array having a plurality of sections and being arranged to allocate a section to each said pre-fetch request before each request is forwarded to the memory.
3 more elements
An apparatus, comprising:
- a fetch engine arranged to issue fetch requests to access data items from locations in a memory identified by access addresses in a program being executed;
- a pre-fetch engine controlled to issue pre-fetch requests to speculatively access pre-fetch data items from locations in said memory identified by addresses which are determined as being a number of locations from respective ones of said access addresses;
- and
- a calibrator arranged to selectively vary said number of locations at regular time intervals, wherein the pre-fetch engine is controlled by machine-readable instructions arranged to override the calibrator.
1 more element
An apparatus, comprising:
- a pre-fetch issuer arranged to issue pre-fetch requests;
- a controller arranged to selectively discard issued pre-fetch requests;
- and
- a pre-fetch engine arranged to access pre-fetch data items at locations in a memory in accordance with issued pre-fetch requests that have not been discarded,
- wherein the controller is arranged to selectively discard issued pre-fetch requests in dependence on current running capacity of the memory.
2 more elements
A system, comprising:
- a memory;
- and
- a memory device coupled for communication with the memory, the memory device including:
- a pre-fetch issuer arranged to issue pre-fetch requests;
- a controller arranged to selectively discard issued pre-fetch requests;
- and
- a pre-fetch engine arranged to access pre-fetch data items at locations in the memory in accordance with issued pre-fetch requests that have not been discarded, wherein the controller is arranged to selectively discard issued pre-fetch requests in dependence on current running capacity of the memory.
4 more elements
Dependencies are inferred from the claim text.