Distributed content addressable memory
AssigneeMicron Technology, Inc.
InventorsAlon Regev, Zvi Regev
Life of this patent
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Abstract
The present invention provides a large capacity distributed content addressable memory (CAM) made up of a plurality of smaller CAMs interconnected on a high speed data bus. Each of the smaller CAMs is located at a local node on the data bus and configured to receive commands originating from both the local node in which the CAM is located and a local node in which another CAM on the data bus is located. As the resources and the data being stored by all the CAMs are shared through the high speed data bus, the aggregate contents of all the CAMs can be viewed as being stored in a single virtual CAM.
Claims41
A distributed content addressable memory (CAM), comprising:
- a plurality of CAMs interconnected on a ring bus by a first plurality of data paths that make up the ring bus such that a command received at a first CAM on said ring bus is executable by said first CAM and also by another CAM on the ring bus.
A distributed content addressable memory (CAM), comprising:
- a plurality of CAMs interconnected on a ring bus by a plurality of data paths that make up the ring bus such that a command received at a first CAM on said ring bus is executable at said first CAM and also executable at every other CAM on said ring bus.
A distributed content addressable memory (CAM), comprising:
- a first CAM having a data input and a data output;
- and
- a data input of a second CAM coupled to said data output of said first CAM via a first data path, and a data output of said second CAM coupled to said data input of said first CAM via a second data path such that a command received from a local input of said first CAM is executable at both said first and said second CAMs.
A semiconductor memory chip, comprising:
- a distributed content addressable memory (CAM), said distributed CAM comprising:
- a plurality of CAMs interconnected on a ring bus by a plurality of data paths that make up the ring bus such that a command received at a first CAM on said ring bus is executable at said first CAM and also executable at at least a second CAM of said plurality of CAMs.
A router, comprising:
- a plurality of message receiving inputs;
- a plurality of message transmitting outputs;
- and
- a distributed content addressable memory (CAM) for providing routing information for information flow from said inputs to said outputs, said distributed CAM comprising:
- a plurality of CAMs interconnected on a ring bus by a plurality of data paths that make up the ring bus such that a command received at a first CAM on said ring bus is executable by said first CAM and also by another CAM on the ring bus.
A method for operating a distributed content addressable memory (CAM), the method comprising:
- receiving a command at a first CAM of a plurality of CAMs interconnected on a ring bus;
- and
- initiating execution of said command at said first CAM;
- and
- if execution of said command at said first command at said first CAM does not occur, initiating execution of said command at at least a second CAM of said plurality of CAMs.
A method for operating a distributed content addressable memory (CAM), the method comprising:
- receiving a command at a first CAM of a plurality of CAMs interconnected on a ring bus;
- executing said command at a second CAM on said ring bus;
- and
- passing a result of said executing operation to said first CAM via said ring bus.
Dependencies are inferred from the claim text.