Fractional-N phase locked loop

A method of generating a phase-locked loop output signal, comprising:

• generating a phase difference signal that represents a phase difference between a reference clock signal and a signal having twice the frequency of a comparison signal by comparing a phase of the reference clock signal with a phase of a signal having a frequency that is twice that of the comparison signal;
• generating the phase-locked loop output signal having a frequency that is a function of the phase difference signal;
• receiving the phase-locked loop output signal and generating therefrom a divided frequency signal;
• and
• generating the comparison signal from the divided frequency signal, wherein the comparison signal has one half the frequency of the divided frequency signal.

A phase-locked loop comprising:

• a phase detector that has a reference signal input that receives a reference clock signal and a comparison signal input that receives a comparison signal, wherein the phase detector generates a phase difference signal that represents a phase difference between the reference signal and a signal generated by the phase detector having twice the frequency of the comparison signal;
• a circuit that generates a phase-locked loop output signal having a frequency that is a function of the phase difference signal;
• a frequency divider that receives the phase-locked loop output signal and generates therefrom a divided frequency signal;
• and
• a circuit that generates the comparison signal from the divided frequency signal, wherein the comparison signal has one half the frequency of the divided frequency signal.

A method of generating a phase-locked loop output signal, comprising:

• generating a phase difference signal from a reference clock signal and a signal having twice the frequency of a comparison signal;
• generating the phase-locked loop output signal having a frequency that is a function of the phase difference signal;
• receiving the phase-locked loop output signal and generating therefrom a divided frequency signal;
• and
• generating the comparison signal from the divided frequency signal, wherein the comparison signal has one half the frequency of the divided frequency signal.