Clock regenerator for use in demodulating digital modulated signals

A clock regenerator for use in a receiver digital apparatus in a digital transmission system for receiving a frame signal transmitted from a sender digital apparatus, the frame signal including a preamble pattern composed of a predetermined number of bits each having a predetermined logical value and being modulated by a digital modulation scheme, the receiver digital apparatus quadrature-detecting the modulated signal transmitted from the sender digital apparatus into a quadrature detection signal in a form of base-band signal, said clock regenerator comprising:

• a phase detector receiving the quadrature detection signal and detecting a phase of the received quadrature detection signal to form first phase information representative of the detected phase;
• a first differential circuit calculating, for each symbol, a difference between the first phase information and one-symbol-delayed phase information of the first phase information to output the difference as first phase difference information;
• a second differential circuit calculating, for each symbol, a difference between the one-symbol-delayed phase information and two-symbol-delayed phase information of the first phase information to output the difference as second phase difference information;
• a third differential circuit calculating, for each symbol, a difference between the first phase difference information and the second phase difference information to output the difference as phase-difference difference information;
• and
• a clock regenerator extracting a symbol timing from the phase-difference difference information on a basis of the preamble pattern, and regenerating a clock signal synchronizing with the extracted symbol timing.

A method of regenerating a clock signal comprising the steps of:

• receiving an input signal and detecting a phase of the received signal to form a detection result representative of the detected phase;
• delaying the detection result for a predetermined period of time to form first delay information;
• calculating a difference between the detection result and the first delay information to form first phase difference information;
• forming second delay information resultant from delaying the detection result for a period of time which is twice as long as the predetermined period of time;
• calculating a difference between the first delay information and the second delay information to form second phase difference information;
• calculating a difference between the first phase difference information and the second phase difference information to form third phase difference information;
• and
• extracting a timing signal on a basis of the third phase difference information and generating a clock signal synchronizing with the timing signal.

A method of regenerating a clock signal in a receiver digital apparatus in a digital transmission system, comprising the steps of:

• receiving a frame signal transmitted from a sender digital apparatus, the frame signal including a preamble pattern composed of a predetermined number of bits each having a predetermined logical value and being modulated by a digital modulation scheme;
• quadrature-detecting the modulated signal transmitted from the sender digital apparatus into a quadrature detection signal in a form of base-band signal;
• detecting a phase of the quadrature detection signal and forming first phase information representative of the detected phase;
• delaying the first phase information by one symbol period of time to form one-symbol-delayed phase information;
• calculating, for each symbol, a difference between the first phase information and the one-symbol-delayed phase information to form first phase difference information;
• forming two-symbol-delayed phase information resultant from delaying the first phase information by two symbol periods of time;
• calculating, for each symbol, a difference between the one-symbol-delayed phase information and the two-symbol-delayed phase information to form second phase difference information;
• calculating, for each symbol, a difference between the first phase difference information and the second phase difference information to form phase-difference difference information;
• and
• extracting a symbol timing from the phase-difference difference information on a basis of the preamble pattern, and regenerating a clock signal synchronizing with the extracted symbol timing.