Decoding structure for a memory device with a control code
AssigneeSTMicroelectronics S.r.l.
InventorsEmanuele Confalonieri, Marco Sforzin
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Abstract
A decoding structure for a memory device with a control code is used in a memory including a matrix of memory cells grouped into pages to each of which a block of control information is associated, and a plurality of reading elements for reading a plurality of pages in parallel. The decoding structure selectively connects each reading element to a plurality of memory cells, and selectively connects each memory cell to a plurality of reading elements.
Claims32
A decoding structure for a memory device with a control code and including a matrix of memory cells grouped into pages to each one of which a block of control information is associated, and a plurality of reading elements for reading a plurality of pages in parallel, the decoding structure comprising:
- a first circuit for selectively connecting each reading element to a plurality of memory cells;
- and
- a second circuit for selectively connecting each memory cell to the plurality of reading elements.
A memory device comprising:
- a matrix of memory cells grouped into pages to each of which a block of control information is associated;
- a plurality of reading elements for reading a plurality of pages in parallel;
- and
- a decoding structure for selectively connecting each reading element to a plurality of memory cells, and for selectively connecting each memory cell to the plurality of reading elements.
A memory device comprising:
- a matrix of non-volatile multilevel memory cells grouped into pages to each of which a block of control information is associated;
- a plurality of reading elements for reading a plurality of pages in parallel;
- a decoding structure for selectively connecting each reading element to a plurality of memory cells, and for selectively connecting each memory cell to the plurality of reading elements;
- and
- an output circuit connected to said decoder structure for outputting a plurality of words of read pages in a burst mode starting from a first word identified by a word address.
A method for reading a memory device comprising a matrix of memory cells grouped into pages to each of which a block of control information is associated, and a plurality of reading elements for reading a plurality of pages in parallel, the method comprising:
- using a decoding structure for selectively connecting each reading element to a plurality of memory cells, and for selectively connecting each memory cell to a plurality of reading elements.
Dependencies are inferred from the claim text.