Memory storage device which regulates sense voltages
AssigneeHewlett-Packard Development Company, L.P.
InventorsAndrew L. Van Brocklin, Peter Fricke, John M. da Cunha
Life of this patent
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Abstract
A memory storage device includes a memory cell configurable to have at least a first conductive state and includes a first and second conductor each electrically coupled to the memory cell. A regulation circuit is configured to regulate a sense voltage on the second conductor to be independent of a current conducted through the first conductor when the memory cell is configured to have the first conductive state.
Claims29
A memory storage device, comprising:
- a memory cell configurable to have at least a first conductive state;
- a first and second conductor electrically coupled to the memory cell;
- and
- a regulation circuit configured to regulate a sense voltage on the second conductor to be independent of a current conducted through the first conductor when the memory cell is configured to have the first conductive state.
A memory circuit formed on a substrate, comprising:
- at least two memory cells each configurable to have a first resistance state or a second resistance state;
- a first conductor coupled to the at least two memory cells and configured to conduct a current from the memory cells which are configured to have the second resistance state;
- at least two second conductors each coupled to a corresponding one of the at least two memory cells;
- and
- a regulation circuit configured to regulate a sense voltage on each of the at least two second conductors to be independent of the current conducted through the first conductor from the memory cells which are configured to have the second resistance state.
A regulation circuit for controlling a sense voltage in a memory storage device which includes at least two memory cells each configurable to have a first resistance state or a second resistance state, a first conductor coupled to the at least two memory cells and at least two second conductors each coupled to a corresponding one of the at least two memory cells, the regulation circuit comprising:
- a diode coupled between a bias voltage and the first conductor configured to regulate a voltage on the first conductor to be approximately equal to the bias voltage and to regulate a sense voltage on each of the at least two second conductors to be independent of a current conducted through the first conductor from one or more of the at least two memory cells which are configured to have the second resistance state.
A memory array, comprising:
- an array of memory cells each configurable to have a conductive state or a substantially non-conductive state;
- an array of first conductors extending in a first direction and intersecting the array of memory cells and configured to conduct a current from the memory cells which are configured to have the conductive state;
- an array of second conductors extending in a second direction and intersecting the array of memory cells;
- and
- an array of regulation circuits each electrically coupled to a corresponding first conductor, wherein each regulation circuit is configured to regulate a sense voltage on each one of the second conductors to be independent of a current conducted through the corresponding first conductor from one or more of the memory cells which intersect the corresponding first conductor and which are configured to have the conductive state.
A memory storage device, comprising:
- a memory cell configurable to have a conductive state;
- a first and second conductor electrically coupled to the memory cell;
- and
- means to regulate a sense voltage on the second conductor to be independent of a current conducted through the first conductor when the memory cell is configurable to have the conductive state.
A method of controlling a sense voltage, comprising:
- providing a memory cell configurable to have a conductive state;
- providing a first and second conductor electrically coupled to the memory cell;
- and
- regulating the sense voltage on the second conductor to be independent of a current conducted through the first conductor when the memory cell is configured to have the conductive state.
A method of controlling a sense voltage, comprising:
- providing at least two memory cells configurable to have a first resistance state before being programmed and configurable to have a second resistance state after being programmed;
- providing a first conductor coupled to the at least two memory cells;
- providing at least two second conductors each coupled to a corresponding one of the at least two memory cells;
- and
- regulating the sense voltage on each of the at least two second conductors to be independent of a current conducted through the first conductor from one or more of the memory cells which are configured to have the second resistance state.
Dependencies are inferred from the claim text.