Enhanced refresh circuit and method for reduction of DRAM refresh cycles
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorChung-Cheng Chou
Life of this patent
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Abstract
A method and circuits are disclosed for refreshing a memory module. After receiving a refresh address identifying a word line to be refreshed, the refresh address is located in one of a predetermined number of memory blocks of the memory module that is monitored. It is further determined whether the word line has been accessed while the memory block is being monitored. If it is determined that the word line has not been accessed, the word line is refreshed. If it is determined that the word line has been accessed, the refreshing operation is skipped for that word line.
Claims20
A method for refreshing a memory module comprising:
- receiving a refresh address identifying a word line to be refreshed;
- locating the refresh address in one of a predetermined number of memory blocks of the memory module that is monitored;
- determining whether the word line has been accessed while the memory block is being monitored;
- and
- refreshing the word line if it is determined that the word line has not been accessed, while skipping the refreshing if it is determined that the word line has been accessed.
A circuit for refreshing a memory module comprising:
- a memory block location module for receiving a refresh address identifying a word line to be refreshed and for locating the refresh address in one of a predetermined number of memory blocks of the memory module;
- and
- an evaluation module for determining whether the word line has been accessed during a time period in which the located memory block is monitored,
- wherein the word line is refreshed if it is determined that it has not been accessed, while skipping the refreshing if it is determined that the word line has been accessed during the time period.
A method for refreshing a memory module comprising:
- dividing the memory module into one or more memory blocks;
- monitoring the memory blocks sequentially during a refresh operation of the memory module, wherein while conducing the refresh operation:
- receiving a refresh address identifying a word line in a monitored memory block to be refreshed;
- determining whether the word line has been accessed while the memory block is being monitored;
- and
- refreshing the word line if it is determined that the word line has not been accessed, while skipping the refreshing, if it is determined that the word line has been accessed.
Dependencies are inferred from the claim text.