Memory cell strings
AssigneeHewlett-Packard Development Company, L.P.
InventorsKenneth K. Smith, Corbin L. Champion, Stewart R. Wyatt, Frederick A. Perner
Life of this patent
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Abstract
A data storage device comprising a first memory cell string that includes at least a first magnetic random access memory (MRAM) cell coupled to a second MRAM cell and a circuit coupled to a node between the first MRAM cell and the second MRAM cell is provided. The circuit is configured to detect a voltage change at the node in response to a voltage being provided to the memory cell string and in response to a write sense current being applied across the first MRAM cell.
Claims25
A data storage device comprising:
- a first memory cell string that includes at least a first magnetic random access memory (MRAM) cell coupled to a second MRAM cell;
- and
- a circuit coupled to a node between the first MRAM cell and the second MRAM cell, the circuit configured to detect a voltage change at the node in response to a voltage being provided to the memory cell string and in response to a write sense current being applied across the first MRAM cell.
A method of performing a read operation from a first memory cell in a memory cell string that includes the first memory cell and a second memory cell comprising:
- providing a voltage to the memory cell string;
- measuring a first voltage at a node between the first and second memory cells;
- applying a write sense current across the first memory cell;
- measuring a second voltage at the node;
- and
- determining whether the first voltage differs from the second voltage.
A system comprising:
- a first memory cell;
- a second memory cell coupled to the first memory cell;
- a transistor coupled to a node between the first and second memory cells and coupled to a bit line associated with the first memory cell;
- a means coupled to the bit line for detecting a voltage change at the node in response to:
- a first voltage being provided to the first and second memory cells;
- a write sense current being applied on the bit line;
- and
- a second voltage being provided to the transistor.
Dependencies are inferred from the claim text.