Matched delay line voltage converter
AssigneeThe Regents of the University of Colorado
InventorsMichael Vincent, Dragan Maksimovic
Life of this patent
Estimating the term…
Abstract
A method and apparatus for measuring or converting voltage, the method comprising: applying an input voltage to a primary delay line; applying a reference voltage to a timer delay line; propagating a delay signal through the primary delay line; propagating a timer signal through the timer delay line; establishing a sampling period based on the timer signal propagation; and measuring an extent of delay signal propagation along the primary delay line during the established sampling period, the measured signal propagation extent being indicative of a difference between the input voltage and the reference voltage.
Claims20
An analog-to-digital converter (ADC) comprising:
- a source of an input voltage;
- a source of a reference voltage;
- a primary delay line connected to said source of an input voltage, and having a delay signal input and a plurality of tap outputs;
- a timer delay line connected to said source of a reference voltage and having a timer signal input and a timer signal output;
- a delay signal source connected to said delay signal input and said timer delay signal input, and
- a digital output circuit coupled to said tap outputs and said timer signal output to provide a digital output indicative of a difference between said input voltage and said reference voltage.
Dependencies are inferred from the claim text.