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US 6,958,720 B1Granted
Fine string compensation to minimize digital to analog converter differential nonlinearity error
AssigneeNational Semiconductor Corporation
InventorJames S. Prater
Life of this patent
Estimating the term…
Abstract
Disclosed is a process for minimizing digital-to-analog converter differential nonlinearity by adjusting taps in resistive elements in a fine resistor string voltage divider circuit. Active buffer circuits can be eliminated while still minimizing DAC DNL and insuring circuit monoticity.
Claims18
A method of converting a digital code to an analog signal comprising:
- providing a two-stage resistor divider circuit having a coarse resistor string and a fine resistor string;
- tapping said fine resistor string in at least one position on said fine resistor string that provides compensation for resistive loading created by connecting said fine resistor string in parallel with at least one resistor in said coarse resistor string.
A digital-to-analog converter that reduces differential non-linearity comprising:
- a coarse resistor string, connected between two potential voltages, having a plurality of coarse resistors;
- a fine resistor string;
- a plurality of switches that connect said fine resistor string in parallel with at least one coarse resistor of said plurality of coarse resistors;
- a tap that connects to a fine resistor of said plurality of fine resistors in a position that provides compensation for resistive loading created by connecting said fine resistor string in parallel with said at least one coarse resistor.
1 more element
Dependencies are inferred from the claim text.